Hello everyone,
When I receive questions like this, I try to offer simple answers that seem to trick a lot of people.
Many compilers default to "word" length addressing unless specifically directed to do otherwise. This is not the most general case, "long word" addressing is the most general case. However, long word addressing uses more memory cycles than word addressing which uses more memory cycles than byte addressing.
So, your instruction "move.l (blabla),A1 probably treats (blabla) as a word address when you meant for it to be a long word address.
So, if this is the case, write the instruction this way: move.l (blabla).l,A1 and add.l A2,(blabla).l
The ".l" will force the compilier to use long word addressing which will probably cure your problem.
Now, for you historical buffs, why would a compiler default to a case that is not the most general case? The answer is that in the really, really old days the MC68000 ran at a blazing 4 MHz. Yes, that's right, all you youngsters, 4 entire MHz. It turned out that if code written for the MC68000 was compiled with a compiler that used long word addressing as the default, the code would take a significant performance hit. So, someone got the bright idea of making "word" addressing as the default which speeded up external memory accesses considerably. If the MC68000 was running a small program (less than 64 Kbytes) and the compiler defaulted to long word addressing, it turned out that many 8-bit processors (yes, only 8-bits) could present a significant challenge to the MC68000 performance.
That is why some compilers do not use long word addressing unless specifically told to do so. Use the ".l" to force long word addressing and I'll bet that your Buss Errors go away.
Regards,
Charlie
-----Original Message-----
From: iomer@... [mailto:iomer@...]
Sent: Tuesday, March 04, 2003 4:39 AM
To: 68300@yahoogroups.com
Subject: [68300] Theoretical questions
Could somebody explain to me why a Bus error exception shall occur
when commands like
MOVE.L (_BlaBla),A1 or
ADD.L A2,(_Blabla)
Well it seems the problem is the indirect access to the var. In
cpu32rm there is no word about indirect access from memory site.
I suspect the problem is caused by the address bus being 24 bit long
while the address registers are 32 bit.
Yet I could use a better explanation
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[Non-text portions of this message have been removed]Message
RE: [68300] Theoretical questions
2003-03-04 by Melear Charles-rdph40
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