Avi,
If you go to all the bother to make sure that all the chip select lines really will be chip selects, you do not need to pull those lines up.
However, a bunch of people are not real careful about configuring the data bus so that all the chip select lines really become chip selects.
Here is one of the worst cases you can get: Data Bus 1 is read as a logic 0 at the release of reset. This makes CS0, CS1 and CS2 into BR, BG and BGA, respectively. Then if either BR or BGA floats low, code execution halts and there is no what you can get control of the bus.
Incidentally, Background Mode accesses are treated as "external accesses" by the CPU. Therefore, if BGA - Bus Grant Acknowledge - is asserted (logic 0), you cannot even use the Background Mode.
So, if you put a pull up on CS0 and CS2, this will keep them from ever being asserted just in case you didn't also pull up Data Bus 1 and then DB1 is read as a 0 at the release of reset.
However, in general, a properly configured chip select line does not need a pull up.
Charlie
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-----Original Message-----
From: avi koren [mailto:aviparker@...]
Sent: Monday, December 09, 2002 8:16 AM
To: 68300@yahoogroups.com
Subject: [68300] Pullup resistors on Chip Select lines
Greetings, this is my first email to this group.
The data sheet for the MC68LK332ACFC16 states that the CSx lines are held at a logic 1 during Reset and out of Reset the CSx lines default to however you drive the data bus during the Reset. So if configured to be CSx it will continue to drive 1 until that address range has been accessed. This suggests that Pull ups are NOT NEEDED. Does anyone have a valid reason for why Pullups should still be utilized on the CSx lines.
Thanks
Avi
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