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RE: [AVR-Chat] Choosing the right chip for timing resolution, SPI and SSI

2009-08-27 by Cat C

Thanks Kelly,


> Yes, thats convenient but I'm thinking you should research the PWM
> capabilities of the AVR as all or almost all of what you want can be
> implemented in hardware. Specifically I'd look into doing it like this:

I never even thought of using the PWM for non-repetitive things; I guess I'll have a look.

> As for the CPU clock, select a crystal for which there are timer
> dividers that will produce the desired time resolution. Don't think you
> can divide by 10 very easily with all the timers. Perhaps 16 MHz would
> be better than 20.

I need the highest possible resolution; so I don't want to lower the clock.
I think I will be only counting not dividing, except for the 2 second period.
16 bit counter would give me a maximum period of 65535/20M = 3.27ms, more than I need.
The 2 second period can be measured in binary multiples, let's say 1024 would give me about 3.5s with 51.2us resolution.

> 
> But if you don't have anything else to do during that time it is more
> deterministic to poll for the condition than to wait in interrupt. And
> see above, you might not have to do even that.

I was even thinking of just counting "nop"s in loops but I don't think I can make a loop of 1 clock cycle.
I thought the ISR overhead would always take the same number of cycles therefore being quite deterministic, if a bit wasteful... am I wrong?

> 
> If there is no hurry you should drop your bias against bit-banging. On a
> project my CPU had to be an SPI slave to another. So I put the SPI

My main/only bias against bit-banging is that it's more work than if I can just setup an interface to do it... and my project schedule is pretty tight.
Also, who knows what I could get the thing to do in the future if it's not busy bit-banging... though I'm not sure how many clocks I can save if I use the SPI interface instead of bit-banging; and in fact the SPI is only used for setup.

Thanks a lot Kelly,

Cat


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