AVR-Chat

--- In AVR-Chat@yahoogroups.com, David VanHorn <dvanhorn@c...> wrote:
> At 08:49 AM 7/28/2004, Graham Davies wrote:

> Where did you get that idea? [that CISC
> and RISC are distinguished by the ability
> and iniability to operate directly on
> memory].

Well, a lot of places, actually. Articles on the Web (such as the one 
mentioned in this thread), in technical magazines and presentations 
by vendors. I've also directly observed the difference in processors 
I've worked with.

> "RISC" and "CISC" are marketing distinctions.

This is also true, but not very interesting.

> The more instructions a processor supports ...

Right you are again, but this is all pretty obvious, non-contentious 
and doesn't further the debate.

> All on-chip ram [of the Z8] is registers.
> > so it is CISC. 
> BZZZT False.

Thank you for pointing out my error in such a kind way. However, I 
wan't talking about the Z8, I was talking about the Z8 Encore! Only 
16 memory locations are accessible at any one time as registers. The 
rest must be addressed as memory using one of an intimidatingly large 
number of addressing modes. However, once you've addressed a memory 
location, you can do things to it directly without loading to a 
register, operating and storing the result.

So, it is CISC.

Bing! True.

Graham.