AVR-Chat

Of course, you checked to make sure your interrupt vector table is correct?
Dead interrupts or spurious interrupts have *always* been due to the wrong
interrupt vector table, in my experience.

I forgot to ask: in actual hardware or only in the simulator?  Have you
re-hosted on another processor (m128 or m16) so you can use your JTAG to
examine real hardware?  I find that re-hosting on a more suitable processor,
on a breadboard, using either the JTAG or ICE200 gets me almost all the way
there with very few lines of code change needed to enable the special
peripheral features for the target hardware.  Then it is just a few cycles
of churn & burn to get it right on the target chip.  Well, at least I have
been able to avoid getting a real ICE so far using that technique...

Cheers!

-----Original Message-----
From: David VanHorn [mailto:dvanhorn@cedar.net]
..
In the unfinished INT1 ISR, which is disabled, but firing anyway.
(I'm looking at bits 7,6 in GICR, which oddly seem backward somehow.)
They are both zero though, which should prevent INT0 or INT1 from happening.

Now, about INT1 firing off when it's disabled..
?