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RE: [AVR-Chat] Sim problems, AGAIN.

2004-01-03 by David VanHorn

At 04:49 PM 1/2/2004 -0800, Larry Barello wrote:

>Of course, you checked to make sure your interrupt vector table is correct?
>Dead interrupts or spurious interrupts have *always* been due to the wrong
>interrupt vector table, in my experience.

I checked it twice, but as tired as I am at the moment, (packing for another 1900 mile road trip) I may have missed something..

;***********************************************************************
; INTERRUPT VECTOR TABLE.  YOU MAY NOT CHANGE THE ORDER OF THESE JUMPS!
;***********************************************************************
        jmp     INIT_Machine    ;Restart vector, points to the beginning of the code. 
        jmp     EXT_INT0        ;IRQ 0 
        jmp     EXT_INT1        ;IRQ 1 
        jmp     TIM2_COMP       ;Timer 2 Compare
        jmp     TIM2_OVF        ;Timer 2 Overflow
        jmp     TIM1_CAPT       ;Timer 1 capture 
        jmp     TIM1_COMPA      ;Timer 1 compare A
        jmp     TIM1_COMPB      ;Timer 1 compare B
        jmp     TIM1_OVF        ;Timer 1 overflow
        jmp     TIM0_OVF        ;Timer 0 overflow
        jmp     SPI_Handler     ;Serial transfer complete
        jmp     USART_RXC       ;USART RX complete
        jmp     USART_DRE       ;USART data register empty
        jmp     USART_TXC       ;USART TX complete
        jmp     ADC             ;Analog-Digital Converter
        jmp     EE_RDY          ;EEPROM Ready
        jmp     ANA_COMP        ;Analog comparator
        jmp     TWI             ;Two Wire Serial Interface
        jmp     SPM_RDY         ;SPM
;


>I forgot to ask: in actual hardware or only in the simulator?  

Just sim so far.

>Have you
>re-hosted on another processor (m128 or m16) so you can use your JTAG to
>examine real hardware?  I find that re-hosting on a more suitable processor,
>on a breadboard, using either the JTAG or ICE200 gets me almost all the way
>there with very few lines of code change needed to enable the special
>peripheral features for the target hardware.  Then it is just a few cycles
>of churn & burn to get it right on the target chip.  Well, at least I have
>been able to avoid getting a real ICE so far using that technique...

My experience with the ice-50, starting about two years ago, has been pretty rough.
Interestingly, before then, it was great. Small problems, like the middle two bits in the ADC output swapped. 76534210  stuff like that, but they were determinstic, and relatively easy to work around. 

These days, it's all flaky stuff that dosen't happen 100% of the time.
The ICE-200 worked nicely, but then that was with prev versions of S3, not S4.

You may be better off.

In this one, It's a M8, with no jtag, no ice (tiny package) and no spare pins.
The app is intricate, state driven, and very interactive with the external HW.

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