AVR-Chat

>
>I get a rock steady ADC reading using AVR chips with 2 resistors on the input.
>That is without sleep mode or an LC filter. That is using a 115.2KHz ADC 
>clock.
>Anything lower than 200KHz should be fine.

Indeed.

There are constraints to be observed, like when you change channels, and 
making sure that your Vref is quiet.

You should filter the input though, no sense having anything on the input 
that is significantly faster than your sample rate, or even any where near 
your sample rate.
I get a couple of bits dither, but the systems that I'm working in aren't 
really designed for low noise, nor do they care.  The upper 8 bits is 
plenty, so I didn't bother cleaning up the stuff that's below the noise floor.