AVR-Chat

On Tue, Apr 26, 2005 at 03:33:07PM -0000, arhodes19044 wrote:
> 
> OOOOPS.  That last part, 4 clock cyles, is pretty critical timing.  
> I COULD disable interrupts for just step 4 and 5.
> 
> I can modify the code for the  Libc eeprom code to suit that.  This 
> is a very brief suspension. of the interrupts.

I haven't looked at the avr-libc version but wrote my own, it ain't that
hard. However this code hasn't been tested yet:

//
//	write to EEPROM
//		addr is the address within the EEPROM
//		cp is where to read data in RAM
//		n is the number of 8 bit octets to copy
//
void
ee_writes(uint16_t addr, void *cp, uint8_t n)
{
	for( ; n ; n-- ) {
		wdt_reset();
		while( EECR & (1<<EEWE) )	//  wait until ready
			;
		
		EEAR = addr & (2048-1);	//  stripped to 11 bits, 2kB
		EEDR = *((uint8_t*)(cp)++);	//  looks frightening
		addr++;
	
		cli();			//  an IRQ would ruin this timing
		EECR |= (1<<EEMWE);	//  only stays set for 4 clocks
		EECR |= (1<<EEWE);	//  hit EEWE before EEMWE clears
		sei();			//  assume IRQ was enabled
	}
}

-- 
David Kelly N4HHE, dkelly@HiWAAY.net
========================================================================
Whom computers would destroy, they must first drive mad.