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Re: [AVR-Chat] bypass capacitor

2006-12-13 by np np

But what about spurious spikes and surges caused by noise from the mains getting through?

I remember an old home computer I had that would crash every time  the fridge switched on. Clearly poor  noise filtering.

http://www.ckp-railways.talktalk.net/pcbcad21.htm
 

Jim Wagner <jim_d_wagner@applelinks.net> wrote:                                  On Wed, 13 Dec 2006 08:28:29 -0000
  "magzky02" <magzky02@yahoo.com> wrote:
 > usually, bypass capacitors are placed at all vcc pins of
 > ic's and are 
 > layouted as near as posible to filter out voltage
 > ripples...i tried to 
 > measure the ripples using digital scope and it was around
 > 300mV...but 
 > i think my scope is not accurate since i get a 300mV
 > ripples even when 
 > my probe is not connected or connected to ground...my
 > question is, 
 > What is the tolerable voltage ripples? there is this
 > called embeded 
 > capacitance where in the VCC plane has embeded
 > capacitance.By using 
 > this, the .1 uF bypass capacitors are elliminated...Any
 > idea on how to
 > compare its performance with the one with .1 uF bypass
 > capacitors?
 > regards
 > 
 > mago
 > 
 > 
 
 There was a very similar question to this on AVRFreaks very
 recently.
 
 As long as the ripple voltage stays within the specified
 voltage limits of the processor, IT is OK.
 
 If you are doing a PWM output, the ripple will be
 superimposed on the high logic output of the PWM signal.
 Hopefully, your PWM averaging filter will also remove the
 ripple since it should be even higher in frequency than the
 PWM. 
 
 I am willing to bet that the "ripple" you see on the
 oscilloscope is AC line frequency, not processor clock.
 
 Jim
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