On 12/13/06, magzky02 <magzky02@yahoo.com> wrote:
>
> usually, bypass capacitors are placed at all vcc pins of ic's and are
> layouted as near as posible to filter out voltage ripples...i tried to
> measure the ripples using digital scope and it was around 300mV...but
> i think my scope is not accurate since i get a 300mV ripples even when
> my probe is not connected or connected to ground...
Definitely a problem, you may have large circulating currents.
Do you get this if you connect the probes only to the scope's ground?
my question is,
> What is the tolerable voltage ripples?
Yes.
Only you can say what's tolerable really.. The chip can take a fair bit, but
the question also involves your external hardware. In one project I worked
on, I had a 24 watt chopped stepper driver less than an inch from an
amplifier that had to pick up microvolt sized signals from a magnetic read
head. This also had a small flyback switcher, and 12 mhz micro. With
careful layout and bypassing, on a two layer board, my noise on the power
rails was around 50mV. But everything matters, even how you connect two
bypass caps sitting next to each other, in parallel.
there is this called embeded
> capacitance where in the VCC plane has embeded capacitance.By using
> this, the .1 uF bypass capacitors are elliminated...Any idea on how to
> compare its performance with the one with .1 uF bypass capacitors?
> regards
Unless your board is HUGE, just forget it. There isn't enough capacitance to
matter.
>
--
Feel the power of the dark side! Atmel AVR
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