AVR-Chat

I just noticed something in the Jtag ice MKii manual about an IDR register...
"Enable I/O Debug Register"

What's this, and what devices is it on?

-- 

"The very powerful and the very stupid have one thing in common. Instead of
altering their views to fit the facts, they alter the facts to fit their
views... which can be very uncomfortable if you happen to be one of the
facts that needs altering." Doctor Who, Face of Evil

--- In AVR-Chat@yahoogroups.com, David VanHorn <microbrix@...> wrote:
>
> I just noticed something in the Jtag ice MKii manual about an IDR register...
> "Enable I/O Debug Register"
> 
> What's this, and what devices is it on?

Anyone??

> --- In AVR-Chat@yahoogroups.com, David VanHorn <microbrix@...> wrote:
>>
>> I just noticed something in the Jtag ice MKii manual about an IDR
>> register...
>> "Enable I/O Debug Register"
>>
>> What's this, and what devices is it on?
>
> Anyone??
>
>
>
I was curious and did some searching. JTAG, xmegas, etc, and found nothing.

Jim Wagner
Oregon Research Electronics

--- In AVR-Chat@yahoogroups.com, David VanHorn <microbrix@...> wrote:

> ... in the Jtag ice MKii manual ...
> an IDR register ... "Enable I/O Debug
> Register"
> What's this, and what devices is it on?

This is probably a new feature and like most high-tech new features gets called by different names by different people until the technical writers figure out it's all the same thing.  Your IDR may be the same thing as the OCDR, "On-chip Debug Register", described in section 21.10.1 of the ATmega324P data sheet (8011L-AVR-02.09).  Significantly, this register contains an IDRD bit, "I/O Debug Register Dirty", which gets set when the microcontroller writes to the OCDR.  This is why I suspect some terminology confusion.

Graham.