Gentlemen:
Thank you very much for the feedback it has been very helpful. I appreciate you
taking the time to comment.
I have waited a bit to reply so that I could digest the comments and combine replies
into this single message, see individual replies below. (question: Do members
prefer this type of 'digest'(long) reply or multiple, shorter, individual replies?)
(For those that didn't pickup the original post, this is the board we're talking
about:
Schematic: http://www.whitetrout.net/Chuck/temp/Signal_Interface_sch.pdf
Board: http://www.whitetrout.net/Chuck/temp/Signal_Interface_brd.pdf )
Cheers,
Chuck Hackett
"Good judgment comes from experience, experience comes from bad judgment"
7.5" gauge Union Pacific Northern (4-8-4) 844 http://www.whitetrout.net/Chuck
> -----Original Message-----
> From: Geo
>
> I have had a quick look - might be easier to post the actual board files
> as I could not switch off layers in the pdf to see things more clearly.
Yup, It would be lots easier to see some stuff with some of the layers off. I
figured that anyone could see the PDF version but next time I'll put up PDF and
Eagle versions.
> Two thoughts - I was looking initially at the autorouting (obvious) and
> the vias around the connector. When hand soldering thru-hole components
> it is /very/ easy to short to any vias which are too close. The one
> between pins 12 and 14 is particularly vulnerable against pin 11.
Yea, I'll have to watch that for my (homemade) prototype boards but I expect it
would be ok for the production ones.
> Looking at the track from IC3 pin 6 to IC3 pin 2 (CANL) this has three
> unnecessary vias by JP1 when it could have continued directly to pin 18
> without changing layer at all.
Yea, welcome to the Eagle Autorouter. I have searched the web and posted on the
Yahoo Eagle group but so far I have been unable to turn up any documentation on how
the Autorouter "thinks" (i.e.: methodology & sequence of logic application) or much
documentation on the exact meaning and impact of a lot of the
DRC/Autorouter/Optimizer parameters. Without this knowledge one can not make best
use of the Autorouter. There may be lots of "gold" hidden within, but, without a
roadmap it's hard to find it which I think is why many give up on it.
Before I have the production boards made (maybe 50 of them?) I'll increase the size
of the power traces and take the time to do some hand routing to improve the
situation.
> I don't know /anything/ about CAN but given your schematic, would have
> kept CANL and CANL at one end of JP1 (moving IC3 to the right of IC7)
> and keeping the tracks with (say) double clearance from anything else
> since the bus does not enjoy the protection you have applied to other
> pins for external wiring.
The CAN bus does have a TVS protection network, it's IC4 in the schematic and in the
brd PDF it's the three-terminal SMD device located on the bottom side between the
ATMega32a and the 40-pin connector.
> I would also move any tracks *well* away from fixing holes bearing in
> mind the possible use of oversize screw heads/washers and slipping
> screwdrivers.
Point taken. I think that the holes you are referring to are the large holes at
either end of the 40-pin connector. These are to mount a top-side handle that will
be used to plug this board into a "base board" (tight fit in the enclosure). The
base board will have the field wiring terminals as well as fuses on the TVS
protected lines to protect the TVSs and traces from high voltage (using appropriate
clearances on the field side of the fuses) and current in large surge situations
(again, I have no illusions of the board surviving a direct strike).
> A minor point - I would bring out the tracks from pins 2, 3 and 5 of IC7
> (GND) slightly away from the IC pads before joining them since a track
> across the pads could possibly rob solder from the pins.
Given that the pins are so close (and thus not a lot of area to "suck solder") I
didn't think that this would be a problem but I'll watch for it.
> Good luck with the project.
Thanks, I'll post results down the road.
> -----Original Message-----
> From: n1ist
>
> On the schematic:
> - The 7805 wants a ceramic cap (100-330nF) on the input side to reduce the
> chance of oscillating
Thanks, I'll add that. I hadn't seen it used on the Olimex boards I was using as
one guideline.
> - The general rule of thumb is one 100nF bypass cap per power pin on each IC
So I'll need 3 more on the ATMega32A to cover VCC(5, 17, 38), AVCC(27), AREF(29)?
In other words, one on each of the four sides of the package.
> - Aref should be connected to a 100nF cap to ground, not Vcc
Ooops, god catch, I was thinking that I needed to connect this to the ref voltage I
wanted to use (VCC in my case) but forgot that it (can be) connected to AVCC
internally and that use this pin for noise rejection (cap). I'll definitely make
that change.
> - Stylistic note - you should not have any 4-way connections on the schematic
> (like either end of R3). They make it hard to catch inadvertent connections
> or missing ones where nets cross
This has me confused. Can you describe how this should it be drawn?
> - I would add a 6-pin ISP header, just in case
I have always found JTAG to work well for everything I've done. As far as I know,
the only "shoot your foot off" item is don't ever disable the JTAG fuse.
I guess the production boards wouldn't even need the JTAG header since I could
program the processors prior to mounting and they will have a bootloader for
firmware updates via the CAN bus - but at the moment I'm chicken and want to take my
security blanket with me :-)
> - You may want to add a 120R resistor and jumper across the CAN bus for
> termination
Yes, I thought of this too but decided to place the termination resistor on the
"base board" that this board mounts to. This way the customer can swap out boards
without having to remember to check the termination setting. The terminator is more
associated with the field wiring structure than the controller board itself.
> On the board:
>
> - Power and ground traces appear too thin. You want them wider to reduce both
> resistance and inductance
Noted, and on the final "some hand routing required" board, I'll do this.
> - The TVS need a good ground return so any clamping current doesn't get sent
> through other parts
That's why I attempted to place them as close to the connector as possible and
picked pins on the 40-pin connector so that there were not long traces from the TVS
to the pin (thus skipping some pins).
That's also why I placed the TVSs on the bottom of the board. My plan is that, in
the final board, they will connect to a ground plane on the bottom or at least very
heavy traces (I have a separate net class (PROTECTION_PATH) for these.
> - There's a topside trace under IC5's tab. It is too easy for that to short
> to the tab
I assume you mean the thin one under the two "legs"? Yea, I'll have to watch that
one (another Autorouter thing). If you mean the thicker one coming from the right,
that's GND which connects to the GND pour on the large tab of the 7805.
> - Place an obvious pin-1 indicator by the connectors so you don't have to keep
> flipping the board over to find the square pad
The 40-pin is polarized with a hood (besides, the enclosure is so tight you can't
insert it wrong) but, yes, the JTAG and DIAG headers should have clear pin-1
indicators. I wanted to use polarized connectors but they take up a lot of extra
board real-estate.
> - Some board houses don't like having silk screen on solder pads
Yea, I ran into that in the Eagle DRC check and the file checker that Advanced
Circuits (4pcb) uses. Lots of the parts in the Eagle libraries have this problem so
I guess, down the road, I'll move the parts I use to my own library and correct
them. For now I have turned off the offending silkscreen items.
> -----Original Message-----
> From: David Kelly
> In addition to the other excellent suggestions I'm concerned about how close
> you have placed traces to the top edge of the board. Perhaps they are 50 mils
> off, I can't really tell.
>
> How are you mounting this board? I see what appear to be two holes to each
> side of a big connector. Two isn't enough, and those appear to be related to
> the connector.
The board is mounted to a "base board" via the 40-pin connector on the bottom side
of the board (so this board is kind of like a "daughter" board.
These holes are to accept a top-side handle that will be used to plug this board
into a "base board" (tight fit in the enclosure).
The small holes in the corners of the board are only to facilitate my machining
(isolation routing) of the two sides of the board (maintaining registration).
> As has already been suggested, add the ISP header. You have to have the ISP to
> put the chip in JTAG mode. You have to have the ISP to recover from certain
> goofs you can do in JTAG mode.
As mentioned above, I have always found JTAG to work well for everything I've done.
As far as I know, the only "shoot your foot off" item is don't ever disable the JTAG
fuse. ... but then I'm fairly new to this, so ...
> -----Original Message-----
> From: ecros_technology
>
> > ... You have to have the ISP to
> > put the chip in JTAG mode.
>
> This is not true. The ATmega32A will program and debug at the JTAG interface
> as delivered by Atmel. So will all the other JTAG-capable devices of which I
> am aware. JTAG is not a "mode".
>
> > ... You have to have the ISP to
> > recover from certain goofs you
> > can do in JTAG mode.
>
> The only goof you can make that will lock you out of the JTAG port is to
> disable JTAG by clearing the JTAGEN fuse. This is an easy goof to avoid,
> unlike the infamous clock fuse goofs.
Ah, thanks for the confirmation Graham.
> Also, there's no need to bother with an external power-on-reset chip. The
> internal one works fine.
Thanks for that one too. I was wondering about that since the chip has brown-out
protection, etc.
> -----Original Message-----
> From: Dave McLaughlin
> You need to put 1 decoupling cap per VCC pin on the device, as close to each
> pin as possible. I would also consider putting a small 0805 inductor between
> the VCC and AVCC to reduce noise at this input. Also put a 0.1uF decoupling
> at this pin too. AREF can be fed from the same point. I assume you ADC input
> is not critical anyway, but these measures will give a cleaner output and
> good practice. I use the same setup with an MCP3424 from Microchip which I
> run at 16 bit and it is very quiet using this supply input.
Thanks for that ...
> ....
> Looking at the PCB, your power rails look a little on the light side. You
> might want to setup the auto router (if it allows this) to use thicker
> tracks for the power rails. GND is not a real issue if you can plan to lay
> down a GND plane but the VCC needs to be a little thicker and depends on the
> current draw at each point in the circuit.
Yup, on my list.
> ....
> You don't have any termination on the CAN bus. You need to consider adding a
> link selectable 120R resistor for this.
Termination resistor is mounted as part of the field wiring, see comments above.
> I am not sure your arbitration will work well using the UART and remember
> you will see the transmission on the receive side. The reason it may fail is
> that your initial bit bang could be the same for 2 devices transmitting at
> the same time prior to the UART stage. After the UART is started, any
> difference will cause an arbitration on the bus and possible loss of the
> message due to corruption and unless you read back the transmitted message
> you won't see this!
My plan is to encode the preamble (transmitted in the arbitration phase via the
bit-banged pins) such that it is unique on the bus. Once the preamble/arbitration
phase is complete there should be no one else sending, thus, no collision/corruption
(as I understand it, this is not true in the CAN standard). One exception is at
power-up but I plan on having the board listen for bus activity before its initial
transmission.
> Interesting concept and I would be interested to seeing
> how it works out for you. With the amount of work coding wise you need here
> to support this, you could have used the CAN based micros and used the same
> time to get them working. Not as hard is it seems by the way. The only
> downside is that the devices are larger with more pins.
A couple of the reasons for not going with full CAN at first are:
- I already have a lot on my plate with this and didn't want to introduce an
additional learning curve (learn the ins/outs of the AT90CAN128 CAN driver, etc.).
In software development a large number of bugs, project overruns can be attributed
to the number of new (to the developer) technologies introduced in a single design.
I wanted to use the auto-arbitration/bus drive ability of CAN, test the physical
layer and retain the ability to upgrade to full CAN in a follow-on version.
- I can use equipment I have to monitor the bus as I'm debugging things
- I have written lots of UART/USART code so I'm on fairly firm ground there.
> Have you considered manual routing. Ideally the CAN High and Low should be
> routed as a differential pair but if your bus speed is low, you should be OK
> with the way it is now.
Yup, it's becoming obvious that I'll have to do at least some manual routing.
Bus length is more important than speed for me at the moment, hence my selection of
a slew-rate limited CAN bus driver. Right now 56kb would probably be plenty with
something like 128kb being a future max requirement. Bus speed/distance is one of
the things I'll be investigating in the field (scope and message testing) using this
board.
> Your 7805 based design should be OK but as you have no heat sink, just
> ensure that you total circuit current is kept low to avoid this running hot
> and starting to fail on the output. The National Semi switching regulators
> are really easy to design with and their webench design environment makes
> this even easier. I have never had a design not work using the webench.
I have used National's Workbench. I think the last design I looked at only needed 5
external components. I do want to migrate to a switching regulator (and 48vdc field
power bus due to wiring length) but, again, I wanted to limit the new (to me) things
I was introducing in this go-round.
> Any reason why the switch S2 is spread all over the IO Pins? Could not you
> connect direct to PORT B and move the other IO on Port B to the other pins
> used by S2. This will make software much simpler.
Very good point, I'll look at that more closely. On a quick look it seems easy.
S2 was an afterthought. I had pins left over and I thought that it would be nice
for configuration options, etc.
> One last thing, that is mainly just cosmetic. On your inputs at the bottom
> of the schematic, the GND connections don't look the same as the other GND
> connections.
Good point. Originally I had tried to use separate GNDs for the TVS gnd returns and
rest but I ran into problems with Eagle trying to connect them electrically but be
able to control the single physical connection point (connector pins). I'll
investigate this mre down the road.
> Good luck with the project and keep us all updated. Good job so far and good
> to see you having a real go at rolling your own. A good learning exercise
> too.
Thanks, I'll let you know how it turns out ... and how many traces I had to cut and
re-route :-)
> -----Original Message-----
> From: Robert Adsett
> - Consider adding power and ground planes. It frees up your
> available routing space considerably. Also keeps supply impedances low.
> That will likely mean not using milling but in my experience milling
> PCBs is overrated.
How do power and GND planes prevent using isolation routing (I use pcb-gcode)?
After doing some fine tuning on my mill I have found 10 mill traces/separation not a
problem.
In many cases I have increased the actual amount of copper that I remove (space
between traces shown by Eagle) so that soldering is easier since there is no solder
mask to prevent bridges (I wish I had steadier hands!)
> - Use Eagles via restrict layer to keep layers from underneath
> connectors and chips. Especially valuable when hand populating since it
> considerably reduces the chances of a short and since vias are now
> accessible the are available for adding test points or patches. You may
> have to accept some vias in unfortunate places but I'd at least try to
> remove the issue. Auto-routers will relieve you of tedious work but they
> need a lot of guidance to work well.
Thanks for that ...
Anywhere you know of to get more detailed info on the Autorouter?
> - I'd be worried about the size of the heat sink on the regulator.
> You won't need much of a voltage drop or current draw to overwhelm it.
> Consider more copper on multiple layers with thermal vias.
I don't think I'll be taxing the regulator at the moment but I'll watch that.
I also ran into a problem with the Autorouter where, without a GND pour it would
route the board 100% but with a GND pour (polygon covering the whole board) it would
not route 100% (the polygon fell apart in places). Ideas?
> - I don't trust crystals to sockets, I'd solder it to the board.
At the moment I wanted to use a socket because I was not absolutely positive that I
would stick with the 14.xxx Mhz Xtal, but, since customers will be handling these in
the field, I think I agree that it might be a good idea to solder them to protect
against one vibrating loose.
> - Unlike some other's I would keep the supply monitor but I'm paranoid :)
Who, me?, paranoid? ... :-)
> - On silk screen less is more. Eagle's are overly ornate. They do
> have it split into several layers as I recall. All you really need and
> all the is actually useful is an extents indicator, a pin 1 or polarity
> indicator and an ID.
Yup, that's what I've cut it down to.
> - Add a silkscreen rectangle (or several) for notes in marker such as
> stuff date, version etc...
> - I normally put PCB part number and rev in copper (the stuffed board
> gets a part number and rev written by marker on silkscreen rectangles)
In the lower-left corner I have a Part number (BC002) and version date (2010-10-18)
in the silkscreen (top side). Hadn't considered another additional info on the
copper side. After all, they are usually together :-)
> - Samtec has a nice sealed connector with a pigtail to a board
> mounted socket that might work for your application, I can look up the
> part number if you like.
Always looking for a better way - fire away ...
> - Don't be afraid to put components on the back of the board,
> particularly passives. That can free up considerable room if you are
> using surface mount and if you are hand stuffing it's not usually harder
> to handle.
The only negative I can think of is that, having SMDs on the back side rules out
"hot plate" soldering for one side. I do have a hot air "pencil iron" size
soldering iron (~1/16" air discharge) that I use for individual parts - I'm a
beginner at this SMD stuff :-)
This, and a SMD re-work station (hot air head w/a dozen different heads, semi-auto
vacuum dismount, X-Y table, stereo scope, etc.) were lucky auction acquisitions when
GE-Healthcare closed their facility here in Tampa.
> -----Original Message-----
> From: Dave McLaughlin
>
> Based on Roberts suggestion on vias, if you go for getting a professional
> board made up, you can have it soldermasked and avoid the via shorting
> issues, but you need to make sure the vias are tented (cover with
> soldermask) so need to check how Eagle does this.
I was planning on solder mask and I read about "tenting" on the SparkFun website.
In Eagle, you can tell it to place solder mask over all holes smaller than X so, as
I understand it, all I have to do is specify a size larger than the vias but smaller
than the through-hole component holes.
> Professional boards are not that expensive with a number of companies
> offering a 1 or 2 off service at a very competitive price. www.ezpcb.com is
> one and then there is www.pcb123.com. You can then worry little about doing
> through holes and make the via's smaller as you won't have to solder pins in
> to join each side. Actually, you would need to make sure there were none
> under your AVR if you are going to hand solder as the base of the IC only
> has about 0.1mm of clearance with the board surface.
I will be sending the design out to a board house after I verify basic functionality
with a prototype that I mill, stuff, and test. I'd hate to pay $80-$100 for a
couple of prototype boards only to discover some dumb mistake.
> Robert has a good point about REV number etc on the PCB. This way you will
> know at a glance which version this is, if you happen to make a few modified
> versions over time.
Changes? Why would I do that? :-)
> -----Original Message-----
> From: David Kelly
> I have been pleased with PCBFabExpress.com. Can get 5 boards for about $100.
> Soldermask top and bottom, silk one side only, and plated through holes.
>
> As for vias, I usually put soldermask over them.
Added them to my lest to check out ...
---------- That's it, finally :-) --------------------------------
Thanks again for all your input ...
Cheers,
Chuck Hackett
"Good judgment comes from experience, experience comes from bad judgment"
7.5" gauge Union Pacific Northern (4-8-4) 844 http://www.whitetrout.net/Chuck