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Further Adventures

Further Adventures

2007-07-11 by Dave VanHorn

Has anyone (other than me.. :)  seen odd behaviour with the WDT in 
the M128?

What I'm seeing now, is a timeout period that's in the low 
milliseconds, even with the prescaler set to MAX.
It's supposed to be about 2 seconds this way..

I'm running on an 8 MHz internal RC.

Originally I had a single timed WDR at 200mS intervals, but this 
isn't working now.. I did a lot of checking for system problems, as 
my "sanity check" routines cause a reset if they detect problems, by 
sitting in a Here: jrmp here loop till the WDT smacks them.
But with internal code, and external logic analyzer, I can see that I 
am getting reset within about 25mS(!) of the last WDR.

I can put WDR in the main loop, and limp around it, but this is very 
puzzling.  The code that I'm using to handle the WDR is a very old 
and trusted routine, using timer 0 for 1mS ints which ARE happening, 
and to make a long story short, I'm sure that the WDR would get 
executed every 200-201mS

Re: [AVR-Chat] Further Adventures

2007-07-11 by John Samperi

At 03:50 PM 11/07/2007, you wrote:
>The code that I'm using to handle the WDR is a very old

That COULD be the problem, I think the M128 needs a different
init than the older chips.

This is what I had in one project when I had to use either old 8515 or new
M8515. Of course I don't know if this is true in your case. :-)

.if     mega8515
         clr             r16
         out             mcusr,r16                       ;Clear reset flags
         ldi             r16,(1<<wdce)|(1<<wde)          ;Start WD 
change timed  sequence
         out             wdtcr,r16
         ldi             r16,(1<<wde)|(1<<wdp2)|(1<<wdp1)|(1<<wdp0)
         out             wdtcr,r16
.else
         ldi             r16,(1<<wde)|(1<<wdp2)|(1<<wdp1)|(1<<wdp0)
         out             wdtcr,r16
.endif

 From the data sheet:

1. In the same operation, write a logic one to WDCE and WDE. A logic 
one must be
written to WDE regardless of the previous value of the WDE bit.
2. Within the next four clock cycles, in the same operation, write the WDE and
WDP bits as desired, but with the WDCE bit cleared.

Regards

John Samperi

********************************************************
Ampertronics Pty. Ltd.
11 Brokenwood Place Baulkham Hills, NSW 2153 AUSTRALIA
Tel. (02) 9674-6495       Fax (02) 9674-8745
Email: john@ampertronics.com.au
Website  http://www.ampertronics.com.au
*Electronic Design * Custom Products * Contract Assembly
********************************************************


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Re: [AVR-Chat] Further Adventures

2007-07-11 by David VanHorn

Interesting..

I'd always thought that I could change the prescaler AT or before
activation without going through the dance, and apparently it works
SOMETIMES that way.

Shifting to the WDCE dance does it for me, and now my 200mS resets
work fine, and a reboot takes about 2 seconds from the command (long
story) as it should..

Thanks!

Now playing with bootloader code.
I have recieved a packet by Xmodem, done all the checking, and wish to
write it to Flash.. First I must erase the appropriate page:

FlashPage:
	clr	ZL
	lds	ZH,XmodemBlk	;The block number
	;00000100 00000000		;Assume block 4
	dec	ZH		;
	;00000011 00000000
	lsr	ZH		;
	;00000001(C) 00000000
	ror	ZL		;		
	;00000001 10000000
	movw	YH:YL,ZH:ZL	;Temp store of the page number

       ;I KNOW I get to this point

	ldi	TEMP,$03	                   ;00000011 PGERS + SPMEN
	sts	SPMCSR,TEMP	;
	spm			; Flash page erase

FP_WaitForErase:
	call	Pip    ;<<<--- I never see this happen!
	lds	TEMP,SPMCSR	;
	sbrc	TEMP,SPMEN	;
	rjmp	FP_WaitForErase	;

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