Hey Florian; I'm pretty sure there's code around to do what Stu's looking for. If not, it's pretty straight-forward to write. Master clock comes in on IN-1, then the code sets gates on OUT-1 through -4 as the stages. You could accept input on IN-2 through -4 to adjust the relative stage timing as well. Mark ---- Florian Anwander (08:12 AM 2/28/2008) wrote: >Hi Mark > >The psim was a nice module idea, but as far as I see it would not work >with external clock signals > >Florian
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Re: [Doepfer_a100] Re: clock division: am i missing something?
2008-02-28 by Mark Pulver