Doepfer

So, any suggestion on how to create a gate signal from an envelope for 
use by the sample and hold? So far, I can send gates from my A-190 and 
from my LFO. However, if I try using one of my envelopes as a gate 
signal, I get nothing. Do I need to drop the voltage or something so 
that it goes into the negative? 

I'm sure I'm missing something basic.

Hi
> So, any suggestion on how to create a gate signal from an envelope for 
> use by the sample and hold? So far, I can send gates from my A-190 and 
> from my LFO. However, if I try using one of my envelopes as a gate 
> signal, I get nothing. Do I need to drop the voltage or something so 
> that it goes into the negative? 
> 
> I'm sure I'm missing something basic.
At least I am missing why you don't use the gate which is triggering the 
envelope also as gate for the S&H?

Florian

I am a curious as Florian. Very peculiar question...

On Tue, Oct 28, 2008 at 7:02 PM, Florian Anwander
<fanwander@mnet-online.de>wrote:

>   Hi
>
> > So, any suggestion on how to create a gate signal from an envelope for
> > use by the sample and hold? So far, I can send gates from my A-190 and
> > from my LFO. However, if I try using one of my envelopes as a gate
> > signal, I get nothing. Do I need to drop the voltage or something so
> > that it goes into the negative?
> >
> > I'm sure I'm missing something basic.
> At least I am missing why you don't use the gate which is triggering the
> envelope also as gate for the S&H?
>
> Florian
>
>  
>


[Non-text portions of this message have been removed]

Of course, you're correct. I'm using the self-triggering Quad ADSR, 
so I can send the D-Gate out to a multiple and send one back to the 
ADSR and the other to the S&H. My interest is purely academic: how is 
my ADSR peak different from an LFO? I use the two interchangeably in 
all other cases. 
LFOs go from -2.5 to +2.5v. 
Envelope gates are at +10v. 

Both these work to trigger the S&H.

Envelopes themselves go from 0v to +8v, yet these never trigger 
gates. 

Specifically: having read the manuals, I can't see anywhere where a 
gate is considered to be a shift from +ve to -ve voltage, but this 
would appear to be the case. Am I right?

--- In Doepfer_a100@yahoogroups.com, achtung_999 
<heinrich.himmelwasser@...> wrote:
>
> 'as curious' I meant of course
> 
> On Tue, Oct 28, 2008 at 8:09 PM, achtung_999 <
> heinrich.himmelwasser@...> wrote:
> 
> > I am a curious as Florian. Very peculiar question...
> >
> >
> > On Tue, Oct 28, 2008 at 7:02 PM, Florian Anwander <
> > fanwander@...> wrote:
> >
> >>   Hi
> >>
> >> > So, any suggestion on how to create a gate signal from an 
envelope for
> >> > use by the sample and hold? So far, I can send gates from my A-
190 and
> >> > from my LFO. However, if I try using one of my envelopes as a 
gate
> >> > signal, I get nothing. Do I need to drop the voltage or 
something so
> >> > that it goes into the negative?
> >> >
> >> > I'm sure I'm missing something basic.
> >> At least I am missing why you don't use the gate which is 
triggering the

> >> envelope also as gate for the S&H?
> >>
> >> Florian
> >>
> >>  
> >>
> >
> >
> 
> 
> [Non-text portions of this message have been removed]
>

'as curious' I meant of course

On Tue, Oct 28, 2008 at 8:09 PM, achtung_999 <
heinrich.himmelwasser@gmail.com> wrote:

> I am a curious as Florian. Very peculiar question...
>
>
> On Tue, Oct 28, 2008 at 7:02 PM, Florian Anwander <
> fanwander@mnet-online.de> wrote:
>
>>   Hi
>>
>> > So, any suggestion on how to create a gate signal from an envelope for
>> > use by the sample and hold? So far, I can send gates from my A-190 and
>> > from my LFO. However, if I try using one of my envelopes as a gate
>> > signal, I get nothing. Do I need to drop the voltage or something so
>> > that it goes into the negative?
>> >
>> > I'm sure I'm missing something basic.
>> At least I am missing why you don't use the gate which is triggering the
>> envelope also as gate for the S&H?
>>
>> Florian
>>
>>  
>>
>
>


[Non-text portions of this message have been removed]

> -----Ursprüngliche Nachricht-----
> Von: Doepfer_a100@yahoogroups.com
> [mailto:Doepfer_a100@yahoogroups.com]Im Auftrag von madrayken
> Gesendet: Dienstag, 28. Oktober 2008 18:31
> An: Doepfer_a100@yahoogroups.com
> Betreff: [Doepfer_a100] Gates
>
>
> So, any suggestion on how to create a gate signal from an envelope for
> use by the sample and hold? So far, I can send gates from my A-190 and
> from my LFO. However, if I try using one of my envelopes as a gate
> signal, I get nothing. Do I need to drop the voltage or something so
> that it goes into the negative?
>
> I'm sure I'm missing something basic.

An envelope signal is not a gate signal but an analog control voltage. If
you don't want to use the gate signal that is used to trigger the envelope
(e.g. by means of a multiple) you may use the A-167 Analog Comparator to
derive a gate signal from the envelope. The quad ADSR A-143-2 has already
several gate ouputs available: End of Attack (EOA), End of Decay (EOD) and
End of Release (EOR).

Best wishes
Dieter Doepfer

madrayken schrieb:
> Of course, you're correct. I'm using the self-triggering Quad ADSR, 
> so I can send the D-Gate out to a multiple and send one back to the 
> ADSR and the other to the S&H. My interest is purely academic: how is 
> my ADSR peak different from an LFO? I use the two interchangeably in 
> all other cases. 
> LFOs go from -2.5 to +2.5v. 
> Envelope gates are at +10v. 
> 
> Both these work to trigger the S&H.
> 
> Envelopes themselves go from 0v to +8v, yet these never trigger 
> gates. 
> 
> Specifically: having read the manuals, I can't see anywhere where a 
> gate is considered to be a shift from +ve to -ve voltage, but this 
> would appear to be the case. Am I right?

Ok, this becomes understandable. But I have no dedicated answer for you.

The only thing I could imagine is, that the trigger threshold for the 
S&H is quite low (lets say at 0.5 Volts) and the Quad ADSR assumingly 
does not return completely to 0 Volts when in self-triggering mode. (I 
know this from other makers envelopes, e.g the ADSR of my Formant does 
not go down to 0 V completely. You have to work with an negative offset 
at the VCA to make it silent).

Florian

> -----Ursprüngliche Nachricht-----
> Von: Doepfer_a100@yahoogroups.com
> [mailto:Doepfer_a100@yahoogroups.com]Im Auftrag von Florian Anwander
> Gesendet: Mittwoch, 29. Oktober 2008 10:57
> An: Doepfer_a100@yahoogroups.com
> Betreff: Re: [Doepfer_a100] Re: Gates
>
>
> madrayken schrieb:
> > Of course, you're correct. I'm using the self-triggering Quad ADSR,
> > so I can send the D-Gate out to a multiple and send one back to the
> > ADSR and the other to the S&H. My interest is purely academic: how is
> > my ADSR peak different from an LFO? I use the two interchangeably in
> > all other cases.
> > LFOs go from -2.5 to +2.5v.
> > Envelope gates are at +10v.
> >
> > Both these work to trigger the S&H.
> >
> > Envelopes themselves go from 0v to +8v, yet these never trigger
> > gates.
> >
> > Specifically: having read the manuals, I can't see anywhere where a
> > gate is considered to be a shift from +ve to -ve voltage, but this
> > would appear to be the case. Am I right?
>
> Ok, this becomes understandable. But I have no dedicated answer for you.
>
> The only thing I could imagine is, that the trigger threshold for the
> S&H is quite low (lets say at 0.5 Volts) and the Quad ADSR assumingly
> does not return completely to 0 Volts when in self-triggering mode. (I
> know this from other makers envelopes, e.g the ADSR of my Formant does
> not go down to 0 V completely. You have to work with an negative offset
> at the VCA to make it silent).
>
> Florian

To obtain a correct function only "digital" signals (i.e. gate, clock or
rectangle LFO signals) should be used as gate sources. But in a modular
system even analog signals (envelopes, non-rectangle LFOs, random signals,
audio signals ...) may be (ab-)used as gate sources. In these cases the
correct gate function cannot be guaranteed because all depends upon the
circuit that is used in the gate input section. For some gate inputs only a
certain level has to be reached to trigger the corresponding function (e.g.
A-148 in T&H mode, A-112 sampling module gate, A-140 ADSR gate). But for
other gate inputs even the rise time is essential (e.g. A-148 in S&H mode,
A-143-2 ADSR gate) because a capacitor is used to generated an internal
trigger signal (kind of AC coupling). The rise time of a "digital" signal
(e.g. clock, rectangle LFO) is always sufficient. But if an analog control
signal is used and the rise time may be not sufficient and the circuit will
not trigger. You may find out that an ADSR can be used for some of these
gate applications if the attack time is short enough but the gate function
will no longer work if the attack time goes beyond a certain value (there
may be even an intermediate state where the functions works  randomly now
and then).

Hope this helps

Dieter Doepfer

Ah! So it's actually partly due to the fact that I use the square 
wave as a gate, and I can't get a square wave from the ADSR? That 
makes sense of why I couldn't use the triangle as a gate, even though 
it goes through the same voltage range. Fascinating! Thanks for the 
information.

--- In Doepfer_a100@yahoogroups.com, <yahoo@...> wrote:
>
> > -----Ursprüngliche Nachricht-----
> > Von: Doepfer_a100@yahoogroups.com
> > [mailto:Doepfer_a100@yahoogroups.com]Im Auftrag von Florian 
Anwander
> > Gesendet: Mittwoch, 29. Oktober 2008 10:57
> > An: Doepfer_a100@yahoogroups.com
> > Betreff: Re: [Doepfer_a100] Re: Gates
> >
> >
> > madrayken schrieb:
> > > Of course, you're correct. I'm using the self-triggering Quad 
ADSR,
> > > so I can send the D-Gate out to a multiple and send one back to 
the
> > > ADSR and the other to the S&H. My interest is purely academic: 
how is
> > > my ADSR peak different from an LFO? I use the two 
interchangeably in
> > > all other cases.
> > > LFOs go from -2.5 to +2.5v.
> > > Envelope gates are at +10v.
> > >
> > > Both these work to trigger the S&H.
> > >
> > > Envelopes themselves go from 0v to +8v, yet these never trigger
> > > gates.
> > >
> > > Specifically: having read the manuals, I can't see anywhere 
where a
> > > gate is considered to be a shift from +ve to -ve voltage, but 
this
> > > would appear to be the case. Am I right?
> >
> > Ok, this becomes understandable. But I have no dedicated answer 
for you.
> >
> > The only thing I could imagine is, that the trigger threshold for 
the
> > S&H is quite low (lets say at 0.5 Volts) and the Quad ADSR 
assumingly
> > does not return completely to 0 Volts when in self-triggering 
mode. (I
> > know this from other makers envelopes, e.g the ADSR of my Formant 
does
> > not go down to 0 V completely. You have to work with an negative 
offset
> > at the VCA to make it silent).
> >
> > Florian
> 
> To obtain a correct function only "digital" signals (i.e. gate, 
clock or
> rectangle LFO signals) should be used as gate sources. But in a 
modular
> system even analog signals (envelopes, non-rectangle LFOs, random 
signals,
> audio signals ...) may be (ab-)used as gate sources. In these cases 
the
> correct gate function cannot be guaranteed because all depends upon 
the
> circuit that is used in the gate input section. For some gate 
inputs only a
> certain level has to be reached to trigger the corresponding 
function (e.g.
> A-148 in T&H mode, A-112 sampling module gate, A-140 ADSR gate). 
But for
> other gate inputs even the rise time is essential (e.g. A-148 in 
S&H mode,
> A-143-2 ADSR gate) because a capacitor is used to generated an 
internal
> trigger signal (kind of AC coupling). The rise time of a "digital" 
signal
> (e.g. clock, rectangle LFO) is always sufficient. But if an analog 
control
> signal is used and the rise time may be not sufficient and the 
circuit will
> not trigger. You may find out that an ADSR can be used for some of 
these
> gate applications if the attack time is short enough but the gate 
function
> will no longer work if the attack time goes beyond a certain value 
(there
> may be even an intermediate state where the functions works  
randomly now

> and then).
> 
> Hope this helps
> 
> Dieter Doepfer
>

> Ah! So it's actually partly due to the fact that I use the square
> wave as a gate, and I can't get a square wave from the ADSR?

It depends what you call a square wave. Even the rectangle output of an LFO
or VCO has a limited rise/fall time (i.e. the voltage jump takes always a
limited time of some microseconds, it's never really zero). An ADSR with
shortest time settings (e.g. an A-140 with attack and release set to zero
and switch to high range) may generate a signal close to an ideal rectangle.
But then it's no longer something you would call an envelope because the
rise and fall times are very short. In this case you could use also the gate
signal that controls the ADSR.

Best wishes
Dieter Doepfer