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Re: [lpc2000] Re: shared memory between processors

2005-11-21 by Ake Hedman, eurosource

Or us I2C (or SPI) already available on the chips.

/Ake

donhamilton2002 wrote:

> --- In lpc2000@yahoogroups.com, 42Bastian Schick <bastian42@m...> wrote:
> >
> > My suggestion: Use message passing and a highspeed UART or SSI.
> > Make the HW and SW design easier.
>
> Depending on how much data is to be passed and at what speed.
>
> A dual port memory (DPM) is a good interface.
> Minimal hardware, if your design already has port decoding available
> on the two busses.
>
> Google for dual port memory, there is even VHDL code available out there.
>
> Or a FIFO ( First In First Out) device.
>
> FIFOs would be like a UART in that you would receive one byte/word at
> a time. And the FIFO would help regulate the speed of transfers
> between busses.
>
> But, as has been mentioned. The software design will get a bit more
> complicated with the DPM.
>
> hamilton
>
>
>
>
>
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-- 
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Ake Hedman (YAP - Yet Another Programmer)
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