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Re: LPC FLASH security (CRP) broken?

2005-12-22 by philips_apps

Robert,

fyi, parallel programming is possible but the only thing parallel is 
the databus, in the end the parallel programmer again uses the 
bootloader for programming. 

The other Robert

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@a...> 
wrote:
>
> At 01:39 AM 12/22/05 +0000, jayasooriah wrote:
> >Was Philips misleading us about Code Read Protection?
> >
> >The preliminary user manual for LPC2119/2129/2194/2292/2294 dated 
2004
> >May 03 in the section on CRP states:
> >
> > > When the code read protection is enabled the JTAG debug
> > > port, external memory boot and the following ISP commands
> > > are disabled:
> > >
> > > • Read Memory
> > > • Write to RAM
> > > • Go
> > > • Copy RAM to Flash
> > >
> > > The ISP commands mentioned above terminate with return
> > > code CODE_READ_PROTECTION_ENABLED.
> > >
> > > The ISP erase command only allows erasure of all user
> > > sectors when the code read protection is enabled.
> >
> >Philips stated (by way of poster dated Sat Dec 17, 2005  11:52 AM)
> >that the purpose of CRP as:
> >
> > > Code Read Protection (CRP) was implemented with intention
> > > to protect on-chip Flash content from preying eyes.
> >
> >It appears that Philips made these claims while it knew that CRP 
can
> >be defeated by other methods, including parallel programming or
> >booting from external memory.
> >
> >1/  LPC parts without external memory interface support parallel
> >programming.  This method can be used to read and write on-chip 
flash.
> 
> I've seen the hints you provided on this but no real evidence 
yet.  Since 
> this appears to directly contradict what is on Philips Website I 
remain to 
> be convinced.  You need to be able to show that the parts can be 
parallel 
> programmed and that method of programming bypasses the CRP 
> features.  Certainly if parallel programming is possible it raises 
that as 
> a possibility since presumably the boot loader would not be 
involved.
> 
> There is another possibility though and that is that you have been 
the 
> victim of marketing manipulation of terms.  It is quite possible 
that the 
> references you have seen to parallel programming are just 
indicators that 
> the devices can be programmed off board with an appropriate 
programmer and 
> that programmer uses either the serial or JTAG ports to do the 
programming.
> 
> 
> >2/  On LPC parts with external memory, it is possible to force the
> >part to boot on external memory.  Code in external memory can 
read and
> >write on-chip flash.
> 
> Well they do claim that turning on CRP disables the ability to 
boot from 
> external memory.  Do you have any evidence to the contrary?  This 
does have 
> the advantage of being easily tested.  Have you tested it and if 
so what 
> did you use for a test case?  If not, why not?  With a test case 
this would 
> be easy to duplicate and verify.
> 
> >If the above claims are not true, it would be a simple matter for
> >Philips to say so.  The fact that Philips has chosen to go quiet 
on
> >this issue seems to suggest the claims are indeed true.
> 
> Hey give them a bit of a chance.  They do, I think, need to 
respond.  If 
> this is coming out of the blue they may need some time to figure 
out 
> exactly what it is they are responding to.  Also at this season 
the people 
> most able to respond may well be on vacation.
> 
> Robert
> 
> " 'Freedom' has no meaning of itself.  There are always 
restrictions,   be 
> they legal, genetic, or physical.  If you don't believe me, try to 
chew a 
> radio signal. "  -- Kelvin Throop, III
> http://www.aeolusdevelopment.com/
>

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