Bill Knight wrote:
> Kris
> Thanks for spotting this. It's the old spurious interrupt problem.
> The fix is to disable global interrupts around the first read-modify-write
> instruction. Doing the direct write (U0IER = xxx) can still allow the
> problem
> to happen. What happens is the interrupt occurs and is recognized while
> the masking instruction is executing but before it has completed. Then
> when the instruction does complete, the interrupt can't find the vector
> so uses the default. So to fix:
>
[snip]
Why should the direct write cause this problem? The issue with
read-modify-write makes perfect sense, but the write should be an atomic
operation. How would you get an interrupt between <nothing> and the write?
--jcMessage
Re: [lpc2000] UART TX FIFO and INTs problem - SOLVED
2004-02-22 by J.C. Wren
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