Lpc2000

Thanks Bill,

I'll certainly keep that one in mind, because I'll be porting a mini_OS,
loosely based on Oleg Skidan's SOS, which I ported to CrossWorks for MSP430,
and sped up the preemption for manual/auto event handling and for the
timers.

Usual story I guess, when a kid's let loose with much more power (here ARM,
and
the kid is me :-), that power too easily turns against you .. :-)

I am truly grateful Bill for your sharing of your experiences.
I interfaced to your UART package as a "sanity check", and found I had
identical
problems as with my code. That was a step in the right direction...

Brgds
Kris
www.microbit.com.au


----- Original Message -----
From: "Bill Knight" <BillK@...>
To: <lpc2000@yahoogroups.com>
Sent: Monday, February 23, 2004 3:13 AM
Subject: Re: [lpc2000] UART TX FIFO and INTs problem - SOLVED


> Version 2 of the UART, Blinky LED codeis now posted.  I went ahead and
> protected the code which re-enables the uart interrupt in addition to
> when it is disabled.  While the demo code does not have a preemptive
> OS, if it did, it would be possible (not probable) for another process
> to sneak in during the execution of the RMW sequence and modify the
> mask.  The protection closes that possibility.
>
> As a side note.  The disabling and restoring of the global interrupt
> flag in the cpsr can has a similar problem.  It has to do with the
> processor actually having multiple psr's and preemptive processes
> doing the same thing to it while the main line code thinks it is
> either enabling or disabling the current IRQ bit.  However, without
> preemptive processes or ISR's which muck with the interrupt flag bits,
> I don't believe there is a problem.  For more info on this, Atmel has
> an APP note discribing it on their web site in the AT91 ARM7 section.
>
> Regards
> -Bill Knight
> R O SoftWare
>
>
>
>
>
>
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