I haven't had any problems at all with the direct write. The weirdest things were happening though with the masking. For example, comm_tx[tx_head++]=ch; would cause problems too (protected but only with U0IER=0x01 ), whereas : temp = (tx_head+1)%RS232_SIZE; ... comm_tx[tx_head]=(UCHAR)c; tx_head=temp; wouldn't ..... Go figure.... I need to retest all these permutations. -- Kris ----- Original Message ----- From: "J.C. Wren" <jcwren@...> To: <lpc2000@yahoogroups.com> Sent: Monday, February 23, 2004 3:18 AM Subject: Re: [lpc2000] UART TX FIFO and INTs problem - SOLVED > Bill Knight wrote: > > > Kris > > Thanks for spotting this. It's the old spurious interrupt problem. > > The fix is to disable global interrupts around the first read-modify-write > > instruction. Doing the direct write (U0IER = xxx) can still allow the > > problem > > to happen. What happens is the interrupt occurs and is recognized while > > the masking instruction is executing but before it has completed. Then > > when the instruction does complete, the interrupt can't find the vector > > so uses the default. So to fix: > > > [snip] > > Why should the direct write cause this problem? The issue with > read-modify-write makes perfect sense, but the write should be an atomic > operation. How would you get an interrupt between <nothing> and the write? > > --jc > > Yahoo! Groups Sponsor > ADVERTISEMENT > > > > > > -------------------------------------------------------------------------- ------ > Yahoo! Groups Links > > a.. To visit your group on the web, go to: > http://groups.yahoo.com/group/lpc2000/ > > b.. To unsubscribe from this group, send an email to: > lpc2000-unsubscribe@yahoogroups.com > > c.. Your use of Yahoo! Groups is subject to the Yahoo! Terms of Service. > >
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Re: [lpc2000] UART TX FIFO and INTs problem - SOLVED
2004-02-22 by microbit
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