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RE: [lpc2000] LPC2148 and Fast I/O question

2006-01-01 by Joel Winarske

> I use a CPLD now, it generates the external interrupt
> from an address range asserted by another processor.
> That frees my ARM up from making a bunch of
> comparisons and memory fetches.  I am not able to move
> all the processing to a CPLD because of the diverse
> responses the project requires.  My ARM uses an 8K
> jump table to react to its input.  I know, thats a
> huge table and many of the locations wont be used, but
> I need a deterministic response over all of them.
> Even though I only use a small percentage of the
> location at any one time, I dynamically reconfigure
> them during execution.  So it many be possible to have
> all of them used at least once.
> 
> Cost is of the highest priority, so a powerful enough
> FPGAs may be out of the question.  Beyond that, I dont
> think I am capable of creating a useful core.

The Altera MAX II CPLDs are essentially non-volatile FPGAs.  This might be
of interest, if anything to see the MAX II capabilities:
http://www.altera.com/literature/ds/ds_maxII_develop_board.pdf

Joel

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