Lpc2000

Tom Walsh wrote:

>I have two LPC2000 series processors on my board interconnected so that 
>either processor can force the other into ISP mode.  The project calls 
>for the current binary image of each processor be stored (SD card) 
>before the new image is loaded into Flash.  Using the ISP command set, I 
>can read all but the first 64 bytes as the MEMMAP (0xE01FC040) register 
>is mapping the IVECTs to the bootloader ROM.
>
>The solution that I see, aside from a generic jump table, is to:
>
>1. Load a small program into RAM
>2. Have it flip MEMMAP to User Flash
>3. Copy n bytes into RAM
>4. Flip MEMMAP back to Bootloader
>5. Return to ISP.
>
> From reading the various LPC2000 user manuals, they seem to suggest 
>this might be possible via the GO command.  The LPC210{4,5,6} reference 
>states that the ISP may be resumed with a simple RETurn at the end of 
>the user code.
>
>Has anyone tried this?  I am hoping that after the call to my code in 
>RAM, and it returns to the bootloader,  that the bootloader will still 
>be "synchronized" and I may proceed with a READ command to fetch those 
>bytes.
>
>  
>
For the benefit of people researching this topic in the future, it does 
work.  Here is the code I uploaded and executed.

============ begin data_code_array ================
static uint copyIt[] = {
    0xe10f5000,    // mrs    r5, cpsr        // turn off interrupts.
    0xe3e000c0,    // mvn    r0, #0xc0
    0xe0000005,    // and    r0, r0, r5
    0xe129f000,    // msr    cpsr, r0
    0xe3a040e0,    // mov    r4, #0xe0    // switch MEMMAP to User Flash
    0xe1a04404,    // mov    r4, r4, lsl #8
    0xe384401f,    // orr    r4, r4, #0x1f
    0xe1a04404,    // mov    r4, r4, lsl #8
    0xe38440c0,    // orr    r4, r4, #0xc0
    0xe1a04404,    // mov    r4, r4, lsl #8
    0xe3844040,    // orr    r4, r4, #0x40
    0xe3a01001,    // mov    r1, #1
    0xe5841000,    // str    r1, [r4]        // now at User Flash
    0xe3a00000,    // mov    r0, #0
    0xe3a01004,    // mov    r1, #0x4
    0xe1a01e01,    // mov    r1, r1, lsl #28
    0xe3811a01,    // orr    r1, r1, #0x1000
    0xe3a02c01,    // mov    r2, #256        // copy 256 bytes from 0x0 
to 0x40000800
          //copyIt0:
    0xe5d03000,    // ldrb    r3, [r0]
    0xe5c13000,    // strb    r3, [r1]
    0xe2800001,    // add    r0, r0, #1
    0xe2811001,    // add    r1, r1, #1
    0xe2522001,    // subs    r2, r2, #1
    0x1afffff9,    // bne    copyIt0
    0xe3a01000,    // mov    r1, #0
    0xe5841000,    // str    r1, [r4]        // now back to Boot Loader 
vectors.
    0xe129f005,    // msr    cpsr, r5        // set flags back to state 
on entry.
    0xe12fff1e    // bx        lr                // return to ISP 
bootloader from "go".
};
============== snip =========================

Dump the contents of that data array into a convenient RAM location of 
the target LPC2000 processor, then execute as "GO nnnn A".



-- 
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net, http://cyberiansoftware.com
"Windows? No thanks, I have work to do..."
----------------------------------------------------