Lpc2000

Hi, Jayasooriah. What do you mean by "hard reset"? If you mean having 
the reset pin low, then I *am* performing a hard reset. The problem 
shows up when I attempt to access ISP via serial port (DTR goes to 
RESET, RTS goes to P0.14).

Guille

--- In lpc2000@yahoogroups.com, Jayasooriah <jayasooriah@...> wrote:
>
> Hi Guille,
> 
> I have seen this problem before on 2292 and the culprit appears to 
be what 
> the boot loader does on watchdog resets when there is on-chip flash 
with 
> external memory boot capability.
> 
> The "USAGE NOTES ON WATCHDOG RESET AND EXTERNAL START" section of 
2292 
> explains (in a longish way) the limitations (see below).
> 
> If you cannot guarantee that certain GPIO signals (not just those 
> documented) are not in a particular state when configured as input 
at the 
> time watch dog timer fires, you can lock yourself up in ways and 
require 
> hard reset.
> 
> It does not matter if you are not using the external boot feature, 
or for 
> that matter, use the external memory interface.
> 
> It is a pity, this appears not to be a processor limitation, but a 
boot 
> loader limitation or bug.  I have not had time to look at the boot 
loader 
> source as yet.
> 
> Jaya
> 
> >USAGE NOTES ON WATCHDOG RESET AND EXTERNAL START
> >
> >When LPC2292/2294 is conditioned by components attached to the 
BOOT1:0 
> >pins to start execution in off-chip memory, and is programmed to 
enable 
> >the Watchdog Timer to reset the part if it is not periodically 
serviced, 
> >care must be taken to avoid problems due to the interaction of 
these features.
> >
> >First, the BOOT1 and/or BOOT0 pin(s) must be biased to ground 
using 
> >pulldown resistors, not transistors driven from RESET low, because 
RESET 
> >is not driven low during a Watchdog Reset.
> >
> >Second, if either or both of the BOOT1:0 pins are used as inputs 
in the 
> >application, the application designer must ensure that the 
external driver 
> >will not be enabled during an internal Reset generated by the 
Watchdog Timer.
> >
> >(One way to do this is to use one of the CS3:0 outputs to enable 
the driver.)
> >
> >If these two conditions cannot be met, an external Watchdog 
facility can 
> >be used.
> 
> 
> >    Date: Mon, 06 Feb 2006 12:53:07 -0000
> >    From: "Guillermo Prandi" <yahoo.messenger@>
> >Subject: Bootloader not always invoked after reset with P0.14 low
> >
> >...
> >
> >5) At T+840 mS, P0.14 goes up sharply. This is 338 mS *after* reset
> >went high.
> >
> >By the spec, these figures should be large enough to trigger the
> >bootloader, and it does, except when I've been playing around with 
my
> >firmware for a while (several cycles of compile+flash programming,
> >tests, an occasional crash, watchdog triggered, etc.). When the
> >bootloader stops responding, the only way to regain the bootloader 
is
> >by removing power.
> >Any ideas?
> >
> >Guille
> 
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