Lpc2000

Is it not suppose to be IO0DIR  &= 0x8FFFFFFF;...???  (You have IODIR0 )   ???
  ----- Original Message ----- 
  From: Sutton Mehaffey 
  To: lpc2000@yahoogroups.com 
  Sent: Friday, March 03, 2006 4:56 PM
  Subject: [lpc2000] Re: AD0 not working properly - help


  Richard,

  I had these set up in an init file that I didn't include with the code.

  Also, it didn't matter if I did the write to AD0CR all at once or
  separate.  No change in the data.

  I couldn't find anything in the errata sheet.  I printed out Errata
  1.2 released on 2/27.  Where is the errata you were referring to?

  Sutton


  IODIR0 &= 0x8FFFFFFF;   // AD0 (P0.28, P0.29, P0.30) defined as inputs
  PCONP |= 0x00001000;    // Enable AD0
  PINSEL1 |= 0x15000000;  // AD0.1, AD0.2, AD0.3 all defined

  AD0CR = 0x01200404;

  // AD0CR |= 0x00200000;  // turn on AD0
  // AD0CR |= 0x00000400;  // divide 12Mhz clock by 3 (max 4.5Mhz ADC clk)
  // AD0CR |= 0x00000004;  // select channel AD0.2
  // AD0CR |= 0x01000000;  // start conversion now

  while ((AD0STAT & 0x00000004) == 0);  // DONE2 status bit in AD0STAT
  result = (AD0DR2 & 0x0000FFC0) >> 6;  // bits 6-15 are result (0-2055)




  --- In lpc2000@yahoogroups.com, Richard Duits <yahoo@...> wrote:
  >
  > You should start the AD conversion with a single write and not a series 
  > of read-modify-write operations.
  > 
  > Also make sure that none of the ADC capable pins stay below 3.3 Volt 
  > even if they are not used as ADC inputs (see errata for more info).
  > 
  > Make sure you configure the pin as ADC input with the pin configuration 
  > registers.
  > 
  > Regards,
  > Richard.
  > 
  > 
  > 
  > 
  > Sutton Mehaffey wrote:
  > > Please help us to improve Yahoo! Groups. Take the survey now! 
  > > <http://v2.decipherinc.com/survey/yahoo/yah05014?list=18>
  > > I am trying to read a battery voltage (~12V) on AD0 channel 2.  I have
  > > a breadboard circuit with a voltage divider that is working properly
  > > that gives a reading between 1.8V and 2.3V more or less.  I am using a
  > > variable power supply to generate these voltages.
  > >
  > > When I connect the 1.8-2.3V to P0.29 (AD0.2), I read CFF (all 10 bits
  > > high) no matter what.  Can someone tell by the code below if I have a
  > > setting wrong?  My PCLK is 12Mhz.
  > >
  > >
  > > AD0CR |= 0x00200000;  // turn on AD0
  > > AD0CR |= 0x00000400;  // divide 12Mhz clock by 3 (max 4.5Mhz ADC clk)
  > > AD0CR |= 0x00000004;  // select channel AD0.2
  > > AD0CR |= 0x01000000;  // start conversion now
  > >
  > > while ((AD0STAT & 0x00000004) == 0);   // DONE2 status bit in AD0STAT
  > > result = (AD0DR2 & 0x0000FFC0) >> 6;   // bits 6-15 are result
  (0-2055)
  > >
  > > DONE2 is set, and result is always CFF.
  > >
  > > Sutton - dodge1955
  >







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