Lpc2000

Sorry if I came off a bit offensive :( , just meant to say that I 
thought your question was a debugger issue. I can't recall where I found 
out about the USB RAM but it was necessary to enable the USB peripheral 
before it would work. I don't use jtag debug as I develop and debug in 
Forth and it was a very easy exercise to find out what was going on when 
I couldn't access the RAM just as it is also in checking out the rest of 
the hardware.

The truth is, it's been a while since I did all that and if I remember 
the USB block diagrams show the RAM as part of the USB peripheral off 
the AHB rather than the normal RAM hanging off the local bus. So I guess 
it seems logical to assume that if the USB is powered-off then the RAM 
is also. So it's more a matter of looking at the diagrams than reading 
the text in this case (I consider myself more of a hardware than 
software guy).

Contrary to what I may have implied (I was very tired), there is only 
the PUSB bit to set to access the RAM.

Once again, my apologies,
*Peter*

P.S. The smilies are a compensation for lack of face-to-face in case I 
do unintentionally manage to offend.

shergtu wrote:
> 2 cents or 10 cents, it's your money.... 
>
> But as long as we're tossing smilies around: if you could come off 
> your throne( :) ) long enough to enlighten us as to exactly *where* 
> in the manual it is stated that the 8K SRAM is only enabled when PCONP
> [31] is set, boy would it be helpful.
>
> After all, you did say (OK, you implied -- "RT*M") that it was in the 
> manual, correct?
>
> Note that I'm asking where the information is stated, not what you 
> inferred from what you read.
>
> P.S.  I only had to set one bit - PCONP[31] - to use the USB RAM 
> properly.  What other bits are you setting to enable it?  (You did 
> say you the "appropriate bits", eh? :) <--- that pesky smiley again!)