Lpc2000

--- In lpc2000@yahoogroups.com, "jayasooriah" <jayasooriah@...> wrote:
> On my board max is 230400 baud with PLL disabled.  If I enable PLL and
> set multiplier to 4 (all else being same) max is now 921600 baud.
> 
> So the smallest divisor works out to be to be 4 in both cases.  Does
> this mean UART baudrate limit is CPU/16/4/VPBDIV?

Correction:  I AM able to get 912600 baud with PLL disabled. 
(Auto-baud sampling resolution was the limiting factor in earlier
experiment.)

However with PLL multiplier set to 4, I still am not able to get
higher baud rates.

I suspect this may have to do with tolerances of the two crystals (on
LPC and on FTDI chip) working against each other.  I like to know if
anyone is operating at higher bauds.

Jaya