Lpc2000

> 
> Suggestion: Slow your JTAG clock down.
> 
> The JTAG clock must not be faster than 1/6 of the core clock 
> frequency. So, if you're running from a 10MHz crystal, and the PLL 
has 
> not been set up yet, then don't run the JTAG clock any faster than 
> 1MHz.
> 
> -- Charles

Tried this, but without success.

I now will try to get the MAJIC (this is the successor of the JEENI) 
for some tests. I guess with the MAJIC this should not be a problem.

I also have some other problem with my hardware, but I will this post 
as new thread to this forum.

Thank you very much your help.

Wini