Lpc2000

--- In lpc2000@yahoogroups.com, "karlstiller" <karls@...> wrote:
>
> > >But, you haven't told us the important stuff: what crystal 
> frequency,
> > >what PLL setup (for a 14.7456 MHz crystal, PLLCFG=0x23 works), what
> > >MAM setup (MAMCR=0x02 and MAMTIM=0x04 works) and what VPBDIV (0x01 
> works).
> 
> Oops.. I knew I forgot something.
> 
> I'm running using an external crystal of 14.7456 MHz.  VPDIV = 0 
> default -> one fourth of the processor clock.   I'm using the 
> following code snippet for setting up the PLL and MAM:
> 
> // PLL
> PLLCFG = 0x23;    // M = 4 P = 2 -> FOSC x 4 = 58980000(cclk)
> PLLFEED = 0xAA;
> PLLFEED = 0x55;   // PLL feed sequence
> PLLCON = 0x1;     // habilita PLL e conecta PLL
> PLLFEED = 0xAA;
> PLLFEED = 0x55;   // PLL feed sequence
> 
> while( !(PLLSTAT & 0x400) );    // wait for PLL lock
> 
> PLLCON = 0x3;      // Connect PLL 
> PLLFEED = 0xAA;
> PLLFEED = 0x55;    // PLL feed sequence
> 
> 
> // MAM
> 
> MAMCR = 0x00;
> MAMTIM = 0x02;     // 2 processor clocks in duration for fetch cycles
> MAMCR = 0x02;
> 
> I don't know if its relevant, but I'm using the IAR compiler (version 
> 4.30) to develop.
> 
> > also look at the support routines in the newlib-lpc lib for an 
> example that 
> > takes the crystal frequency and desired operating frequency as 
> inputs and 
> > set the PLL registers accordingly.  That might give you a double 
> check on 
> > your values.
> > 
> > Robert
> 
> Thanks, I'll check that out.
> 
> Karl
>

It is worth noting that in "MAM USAGE NOTES" on page 59 or the
September 17, 2003 User Manual, for a speed above 40 MHz, 3 CCLKs are
proposed as the MAMTIM value.  Just 'proposed', mind you.

Your MAMTIM value is probably too small.  I have had good success with
a value of 4 but I haven't tried 3.

VPBDIV can be 0x00 if you wish.  I use 0x01 so the VPB bus clock is
the same as the processor clock.

Richard