Lpc2000

Jaya,

> The approach you refer to as "better" is IMO flawed for the following
> reason:
> 
> In the hardware approach, external bus sizing only takes place on
> power on reset.  External bus is invariant for any given system and
> thus a watchdog (or even external reset) does not change this.

This is not always true an all chip families. In fact, I had
an HC16 system that used an external 8 bit wide FLASH for code and
config data storage.

At boot time, the 8 bit FLASH provided basic bootstrap code, which
included copying code and data to faster 16 bit RAM. The HC16 had smart
chip select logic than knew whether a peripheral was 8 or 16 bits
wide.

> In the LPC approach, the watchdog reset does not preserve bus size
> setting because it does a system reset as a blind reset.
> 
> So when a watchdog fires, external bus sizing has to be done all over
> again by software ... but the pins now have taken on a different role
> because these are used as GPIO!

That's the entire point. The watchdog fires and resets the system
to a known state. The previous use of the pin is not relevant.

> There is no way out.  Watchdog reset and "GPIO" usage of BOOT0 and
> BOOT1 pins are mutually exclusive.  The external device driving this
> input has no way of knowing when the watchdog fires.

I have not double checked this on the LPC parts, but on the HC16
system I designed, only weak pullups were used on the pins that
defined bus sizing and other at-reset conditions.

Once the chip was up and running, the pins were used for things
like address and data lines, and the pullups did not affect
their operation.

Like I have suggested in a previous post, your continued lack
of flexibility makes you appear arrogant, which is not one of the
things I would be looking for in a consultant.

Ralph