Lpc2000

John,

Interesting idea. Although simple in theory, I think you're actually 
asking quite a lot of Philips. Just think of all the documentation 
that would have to be updated to reflect the change. This all takes 
time, effort and cost that would have to be justified (ongoing costs 
as well in terms of updated training, support materials etc.)

Can you give some specific examples of what features and functions 
could be implemented if the loader were changed as you suggest? I 
think it would help both others and Philips to support such a move 
if there was more information on what could be achieved by such a 
change.

Brendan

--- In lpc2000@yahoogroups.com, "John Heenan" <l10@...> wrote:
>
> Below is a draft of a possible sensible formal request we could 
make 
> to Philips with regard to bootloader enhancement. It is simple and 
> practical. 
> 
> If Philips agrees we can use interrupts by copying interrupt 
> instructions and constant addresses to the start of RAM and 
setting 
> MEMMAP to RAM mode. We can still use IAP features of the 
bootloader. 
> 
> There is no sense in replacing the bootloader if you accept it 
does 
> its job as is: why chuck IAP when it works great and can be used 
to 
> advantage in an enhancement, such as with USB enhanced bootloading?
> 
> John Heenan
> 
> 
> Dear Philips
> 
> This is a formal request with regard to the bootloader of the 
LPC2xxx 
> series of microcontrollers.
> 
> We are requesting a small enhancement to the bootloader whose end 
> functionality is to 
> - give us an option to bypass the pin 0.14 test by the bootloader 
> when there has been an external reset
> - perform our own bootload tasks taking advantage of IAP if we 
want to
> - rejoin the bootloader informing the bootloader what we now want 
it 
> to do or what we have done
> 
> For existing LPC2xxx parts with flash based bootloaders we are 
> requesting you make an upgrade to the bootloader available to us.
> 
> For the bootloader to decide to bypass four items of information 
are 
> necessary
> 1. Whether to bypass
> 2. Where to bypass to (in supervisor mode expecting ARM 
instructions)
> 3. Where we need to return to if we want to return ('BX LR' is a 
good 
> option)
> 4. What should be specified in a register on return
> 
> On return perhaps R0 could have a value to indicate one of the 
above
> 
> - conduct a normal pin 0.14 test
> - bypass pin 0.14 test as if test is true 
> - bypass pin 0.14 test as if test was false
> - we have used IAP functions to conduct our own bootloading: 
please 
> restart the bootloader as if there was an external reset
> 
> Currently address 0x1FC is used to store the CRP value. If this 
value 
> is 0x8765 4321 (or 0x4321 8765) then Code Read Protection (CRP )is 
> enabled.
> 
> If CRP is not enabled then we request that if the CRP value is 
0x4321-
> --- or 0x----4321 where ---- represents four hexadecimal digits 
then 
> these hexadecimal digits be used to decide a multiple of 4kB to 
jump 
> to. For example if the CRP value is 0x4321 001E or 0x001E 4321 
then 
> this is interpreted to call address 0x1E (decimal 30) times 4kB = 
> 0x0007 B000. This is the start of sector 25 on the LPC2148 and is 
the 
> start of the last 8kB of flash on the LPC2148.
> 
> Given that no flash sector can be less than 4kB for erase purposes 
> (they are either 4kB or 32kB) then there is no advantage in 
> specifying a finer resolution than 4kB as a multiple for call 
purposes
> 
> This request has the support of the following members of the 
LPC2000 
> newsgroup on http://groups.yahoo.com/group/lpc2000/
> 
> John Heenan
> Add your name if you support such a request!
>