--- In lpc2000@yahoogroups.com, "Sutton Mehaffey" <sutton@...> wrote: > > Can someone unconfuse me on several I2C issues as I try to understand > the Philips I2C code in the file section? > > On, my design using a LPC2148, I am using Master Transmitter mode to > address a RAM. > > The AA flag: Is it only used to acknowledge data received from the RAM > after reading from I2C0DAT? I assume that the ACKs received from the > RAM when simply addressing it is not related to AA (but is the SI > bit). I noticed in the Philips code that the only AA assertion is > done after receiving data from the chip. I also assume that the slave > will always give an ACK after sending it data (by the SI flag). Or, > am I totally off base? > > Also, does SCL run all the time, or just during the data transfer? > I'm not seeing a SCL signal at all when I start my code. > > Thanks. > > Sutton > You can get the specifications for the I2C protocol here: http://www.semiconductors.philips.com/acrobat_download/literature/9398/39340011.pdf Regarding SCL, the quick answer is that SCL remains high unless there is an actual transfer in progress. The phasing of SCL and SDA transitions define the start/stop conditions of the bus. -- Dave
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Re: I2C question
2006-05-04 by derbaier
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