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Cycles timing for barrel-shifter usage

2006-05-06 by MB

Hi,

I use the LPC2103 microprocessor and I like it very much.
I was wondering if the usage of barrel shifter in the ARM instruction
set eats up more cycles.
ARM datasheets mention the SHIFT(Rs) eats up one more cycle, though
I'm not sure if they mean that shifting by a register takes a cycle,
but shifting by a const is free, or any shift takes a cycle.

MOV r0, r1, ASR #16 ; 1 Cycle ? 2 Cycles ?
MOV r0, r1, ASR r2  ; 1 Cycle ? 2 Cycles ? 3 Cycles ?

Thanks in advance,
MB

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