At 09:45 PM 5/7/2006 +0000, derbaier wrote: >You can look up the functions of the MAMCR(0xE01FC000) and >MAMTIM(0xE01FC004) registers in the User Manual to see how wait states >are configured, but the RESET state is to have the MAM disabled. I can >not tell from reading the register descriptions if all 6 wait states >are enabled if MAMCR is all zeros, OR if there are no wait states >enabled if MAMCR is disabled. From page 83 of the user manual MAMTIM provides 7 cycles for memory fetch on reset. And earlier in the same section when MAMCR is 0 no memory fetches use latched data, all initiate a fetch cycle. Robert " 'Freedom' has no meaning of itself. There are always restrictions, be they legal, genetic, or physical. If you don't believe me, try to chew a radio signal. " -- Kelvin Throop, III http://www.aeolusdevelopment.com/
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Re: [lpc2000] Re: difference in execution time(Keil, LPC2129)
2006-05-07 by Robert Adsett
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