Lpc2000

Hi,

> The demo code supplied by Rowley has P set to 1 and M set to 4
> (PLLCFG = 0x24) in their example giving 59Mhz with a 14.7Mhz
> crystal.  This gives a Fcco of 117Mhz which should be illegal.

It is correct.
Look at the formula in the ref manual, there is a fixed divide value of 2,
which I suspect
is to ensure a 50% dutycycle on the clock.
IOW, your Fcc= 117 * 2 = 234 MHz.

The mov R1,#24, and #25 example I gave was indeed incorrect, it
was "off the cuff". I DID say it was an example, 0x25 will set M to 5
instead of 4.

I understand your frustration, but please don't take it out on me,
a "thank you" would have been welcome instead of arguing :-)

-- Kris