[re FPGA power consumption] Thank you very much, Leon and Wayne, for the comments and suggestions. I was thinking (vaguely) of building a one-size-fits-most board that consisted primarily of an LPC2106 and a programmable logic chip of some sort. I'm just at the thinking stage, but I have some good leads thanks to Wayne. Another thought (sparked by a comment by Stephen Pelc, in comp.arch.embedded) is the possibility of putting multiple LPC chips on a single board, with the others as slave I/O processors, or whatever, to the main chip, stuffing the extra CPUs only when they were useful for the particular project, but using a "standard board". I'm now leaning toward thinking it would be better not to do that but to do a custom board for each project, primarily to save on board complexity and cost when the extras were not needed. (Then, the "standard board" could be a set of several variants in the CAD software.) Along that line, perhaps running some of the LPC chips from very slow external clocks could get their power consumption very low -- perhaps for a keyboard scanner or other purpose where I might want some logic to stay awake all the time but working very slowly would be adequate. (De-tuning an ARM to the speed of a PIC or Atmel chip (?) and thus getting PIC-sized power consumption, but keeping a single instruction set.) -- Frank
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Re: LPC2106 and FPGA
2004-05-07 by Frank Sergeant
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