Lpc2000

Robert Adsett wrote:

> You are in range of all the PLL specs?  I've seen the micro operate but 
> some peripherals fail when Fcco was out of the specified range and cclk was 
> within the specified range.

Yes, everything looks good to me:

Fosc = 20 MHz
Cclk = 60 MHz
M = 3
P = 2
Fcco = 240 MHz

To make matters worse (or perhaps more interesting), I've now seen some 
processors which fail flash programming via ISP or JTAG at 20 MHz, but 
work with a lower clock (15 or 10 MHz, depending on the part).  I've got 
a device which I successfully programmed with my code (written for 60 
MHz CCLK operation with a 20 MHz crystal), using a 10 MHz clock for the 
flash programming.  I then could run the code fine with the 20 MHz 
clock.  However, anytime I try to program this unit's flash via IAP with 
the 20 MHz clock -- even with the PLL off -- the Philips code again 
seems to get lost in space.  Most of the other parts I've seen the 
problem with were fine @ 20 MHz with the PLL disconnected.

I was following the oscillator discussion a few days ago... however we 
don't think that's the problem because we've taken to using a 
capacitively coupled signal generator for our latest tests.

Ryan