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IAP Flash Programming w/ PLL on...

IAP Flash Programming w/ PLL on...

2004-05-11 by MaxStream - Ryan Bedwell

Anyone out there had problems erasing and/or programming flash via IAP 
calls with the PLL on?  I've seen some problems on some (not all) of our 
systems where the Philips code seems to go off in the sticks (8xxx_xxxx 
- nonexistent on the 2114) if we try to program or erase with the PLL 
connected.  If I disconnect the PLL before, and reconnect it after the 
operations, it seems to work on those same boards.

Any ideas?

Ryan

Re: [lpc2000] IAP Flash Programming w/ PLL on...

2004-05-11 by Robert Adsett

At 12:19 PM 5/11/04 -0600, you wrote:
>Anyone out there had problems erasing and/or programming flash via IAP
>calls with the PLL on?  I've seen some problems on some (not all) of our
>systems where the Philips code seems to go off in the sticks (8xxx_xxxx
>- nonexistent on the 2114) if we try to program or erase with the PLL
>connected.  If I disconnect the PLL before, and reconnect it after the
>operations, it seems to work on those same boards.

You are in range of all the PLL specs?  I've seen the micro operate but 
some peripherals fail when Fcco was out of the specified range and cclk was 
within the specified range.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

Re: [lpc2000] IAP Flash Programming w/ PLL on...

2004-05-11 by MaxStream - Ryan Bedwell

Robert Adsett wrote:

> You are in range of all the PLL specs?  I've seen the micro operate but 
> some peripherals fail when Fcco was out of the specified range and cclk was 
> within the specified range.

Yes, everything looks good to me:

Fosc = 20 MHz
Cclk = 60 MHz
M = 3
P = 2
Fcco = 240 MHz

To make matters worse (or perhaps more interesting), I've now seen some 
processors which fail flash programming via ISP or JTAG at 20 MHz, but 
work with a lower clock (15 or 10 MHz, depending on the part).  I've got 
a device which I successfully programmed with my code (written for 60 
MHz CCLK operation with a 20 MHz crystal), using a 10 MHz clock for the 
flash programming.  I then could run the code fine with the 20 MHz 
clock.  However, anytime I try to program this unit's flash via IAP with 
the 20 MHz clock -- even with the PLL off -- the Philips code again 
seems to get lost in space.  Most of the other parts I've seen the 
problem with were fine @ 20 MHz with the PLL disconnected.

I was following the oscillator discussion a few days ago... however we 
don't think that's the problem because we've taken to using a 
capacitively coupled signal generator for our latest tests.

Ryan

Re: IAP Flash Programming w/ PLL on...

2004-06-15 by Leighton Rowe

Just out of curiosity, is your ISP programming baud rate within the 
specified range?

I know with a 14.7456 Mhz Xtal you can get any ISP programming baud 
you want (9600 - 230000). However at 20MHz it's probably unsafe to 
go over 38400.




--- In lpc2000@yahoogroups.com, MaxStream - Ryan Bedwell 
<ryanb@m...> wrote:
> Robert Adsett wrote:
> 
> > You are in range of all the PLL specs?  I've seen the micro 
operate but 
> > some peripherals fail when Fcco was out of the specified range 
and cclk was 
> > within the specified range.
> 
> Yes, everything looks good to me:
> 
> Fosc = 20 MHz
> Cclk = 60 MHz
> M = 3
> P = 2
> Fcco = 240 MHz
> 
> To make matters worse (or perhaps more interesting), I've now seen 
some 
> processors which fail flash programming via ISP or JTAG at 20 MHz, 
but 
> work with a lower clock (15 or 10 MHz, depending on the part).  
I've got 
> a device which I successfully programmed with my code (written for 
60 
> MHz CCLK operation with a 20 MHz crystal), using a 10 MHz clock 
for the 
> flash programming.  I then could run the code fine with the 20 MHz 
> clock.  However, anytime I try to program this unit's flash via 
IAP with 
> the 20 MHz clock -- even with the PLL off -- the Philips code 
again 
> seems to get lost in space.  Most of the other parts I've seen the 
> problem with were fine @ 20 MHz with the PLL disconnected.
> 
> I was following the oscillator discussion a few days ago... 
however we 
Show quoted textHide quoted text
> don't think that's the problem because we've taken to using a 
> capacitively coupled signal generator for our latest tests.
> 
> Ryan

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