Lpc2000

Hi,

I have been developing software to perform SPI transfers.  I am using 
a logic analyzer to examine the SCLK, MOSI, MISO and gpio signals.  
The board I am using is an IAR Kickstart card with a 14.7MHz clock. 
The first thing that I found was that if I set the SOSPCCR counter 
field to 8, I got a 460.8KHz SCLK signal and everything looked 
correct.  If I changed the SOSPCCR counter to 4, I got a 921KHz SCLK 
signal but the data on MOSI signal shifted so that the correct value 
was not present on the rising edge of SCLK. CPHA and CPOL are both 
zero.  At higher SCLK rates I got 9 positive pulses on SCLK instead 
of 8. Is the maximum usable SCLK limited to somewhere between 460KHz 
and 921KHz or is something wrong.

I use a GPIO pin (P0_16) for a CS signal.  I found that if I execute 
the following code,

        IOCLR_bit.P0_16 = 1;
        S0SPDR_bit.DATA=*ptr;
        ptr++;
        while(!S0SPSR_bit.SPIF);
        IOSET_bit.P0_16 = 1;
        IOCLR_bit.P0_16 = 1;
 
the output signal on P0_16 would fall after the rising edge of SCLK 
and the signal on P0_16 would not rise after the SPI transfer.  The 
following code worked correctly.

        IOCLR_bit.P0_16 = 1;
        IOCLR_bit.P0_16 = 1;
        S0SPDR_bit.DATA=*ptr;
        ptr++;
        while(!S0SPSR_bit.SPIF);
        IOSET_bit.P0_16 = 1;
        IOSET_bit.P0_16 = 1;
        IOSET_bit.P0_16 = 1;
        IOCLR_bit.P0_16 = 1;

This leads me to believe that the GPIO is very slow. Am I doing 
something wrong or is this really the way it is? 

Thank you,
Bob Davis