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Lpc2000

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Message

Re: Problem configuring external interrupts...

2004-08-08 by haack0815

Hi Musharraf,

at the end of your ISR you must reset the VICVectAddr to 0.

Andreas

--- In lpc2000@yahoogroups.com, "Musharraf Ahmed Hanif"
<musharraf_hanif@y...> wrote:
> Thanks for that. The controller now does not hangup during 
> initialization, however, it still processes the interrupt only once. 
> i.e. after the 1st interrupt, all other interrupts are ignored. I am 
> clearing the EINTx flag by writing a 1 to that bit.
> Has anyone managed to use external interrupts without such problems?
> 
> Regards,
> 
> Musharraf Hanif
> 
> --- In lpc2000@yahoogroups.com, "douglasbolton" <doug@c...> wrote:
> > --- In lpc2000@yahoogroups.com, Musharraf Hanif 
> > <musharraf_hanif@y...> wrote:
> > > Hi,
> > > 
> > > I am trying to setup my LPC2129 (MCB2100) to respond
> > > to external interrupts. I am using the following
> > > initialization sequence (For the interrupt):
> > > 
> > > ........
> > > VICVectAddr3 = <whatever>;
> > > VICVectCntl3 = 0x2F;
> > > ........
> > > ........
> > > //Change mode of the interrupt pin
> > > PIN_Set_Mode(014,1,0); //P0.14 with mode bits 10
> > > ........
> > > EXTMODE |= 0x02; //Use Edge triggered
> > > EXTWAKE |= 0x02; //Interrupt wake the processor
> > > ........
> > > EXTINT |= 0x02; //Clear the EINT1 interrupt source
> > > ........
> > > VICIntEnable |= 0x008000; //Enable EINT1
> > > ........
> > > while(1)
> > >   {
> > >   Function_to_toggle_a_GPIO_pin();
> > >   Delay();
> > >   }
> > > 
> > > In the ISR:
> > > {
> > > EXTINT |= 0x02; //clear the source of the interrupt
> > > Counter_G++;
> > > Display_value_of_Counter();
> > > } 
> > > 
> > > Now for the problems:
> > > 
> > > With this initialization sequence, the initialization
> > > stops when changing to edge triggered mode. By
> > > removing this and the following line (Wake up
> > > related), the initialization runs all the way through.
> > > However, in this mode, it is in level triggered mode.
> > > triggering the interrupt causes the counter to be
> > > updated.... however, this happens only once... while
> > > the back ground task continues to run, showing that
> > > the ISR is exited....
> > > 
> > > I should also mention that incase of an undefined
> > > interrupt, the system goes into an infinite loop...
> > > could this and enabling the VIC channel before setting
> > > up the interrupt be the cause of the problem?
> > > 
> > > Can anyone help me in solving this problem?
> > > 
> > > Regards,
> > > 
> > > Musharraf Hanif
> > > 
> > > 
> > > 		
> > > __________________________________
> > > Do you Yahoo!?
> > > Read only the mail you want - Yahoo! Mail SpamGuard.
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> > 
> > 
> > Take a look at the errata data sheet . There are some known 
> problems 
> > and work arounds with external interrupts. 
> > 
> > Doug

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