Lpc2000

Have you set PLLCFG = 0x23 (instead of 0x03 in your original sample) ?

Regards,

        Martin

----- Original Message ----- 
From: "Leighton Rowe" <leightonsrowe@...>
To: <lpc2000@yahoogroups.com>
Sent: Wednesday, August 25, 2004 3:52 PM
Subject: [lpc2000] Re: PLL not locking


> All The IRQ/FIQ interrupts are disabled.
> 
> If I slowly step through with the debugger the PLLSTAT register 
> doesn't even change after the feed sequence
> 
> PLLSTAT shows 0
> 
> And if I just let it run, it will still be stuck in the wait for 
> lock loop...
> 
> PLLSTAT shows 0x0123 
> 
> ...so the PLL's enabled but not locked
> 
> My only guess is the board wasn't connected up as it should be. 
> Since the code is executing, the crystal seems to be ok but right 
> now, it's made not to carry a Reset button.
> 
> Leighton
> 
> --- In lpc2000@yahoogroups.com, "Uwe Arends" <Uwe_Arends@o...> wrote:
>> Leighton,
>> 
>> > Ok then...forgot about the divider value. Well, I tried out what 
> u said too. I expect it to work but apparently the PLL's still
>> not locking...Any ideas?
>> >
>> > > Your setting of PLLCFG would cause it to run at 4*14.7456MHz * 
> 2 * 1 == 117.96MHz,
>> > > just outside the allowed range. Set P to 2 and you should be 
> ok => PLLCFG = 0x23.
>> > >
>> <snip>
>> > > PLLFEED = 0xAA;
>> > > PLLFEED = 0x55;
>> <snip>
>> 
>> the only thing left I can think of is, that the feed sequence 
> doesn't do what it should.
>> Do you have interrupts enabled during the above?
>> 
>> -wue
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