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Lpc2000

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Message

Re: IAR, JLINK and PLL problems

2004-09-08 by douglasbolton

--- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
wrote:
> Hi Doug
> Thanks for the info, and it has helped in some circumstances but I 
> have to manually reset the board before I try to enter the 
debugger. 
> 
> I am now wondering if the board is resetting properly. The Keil 
> evaluation board we are testing with has no reset IC, just an RC 
> network.
> 
> Are you using a reset IC on your target board?
> 
> cheers
> Simon
> 
> 
> --- In lpc2000@yahoogroups.com, "douglasbolton" <doug@c...> wrote:
> > --- In lpc2000@yahoogroups.com, "itsjustimpossible" 
<simonjh@b...> 
> > wrote:
> > > Hi
> > > We are using the IAR workbench and Jlink to develop code for 
the 
> > > LPC2129. I must use the PLL and debug from FLASH as my timing 
is 
> > > criticle but the use of the PLL is preventing the Jlink 
> connecting. 
> <snip>
> > 
> > We had the same problem. Once you have programmed the flash with 
> the 
> > pll enabled the processor is history as far as the debugger is 
> > concerned until you scrub the flash.
> > 
> > I found jlink will work ok with pll running if you set the 
> following 
> > in the jlink menu of the debugger.
> > 
> > 1. tick philips lpc download button
> > 
> > 2. tick reset aserts hardware reset pin
> > 
> > 3. although this is not the case set the cclk to whatever you are 
> > running the cpu clock
> > 
> > we have a 10mhz crystal pumped up to 60 mhz by the pll. In theory 
> we 
> > should set the cclk setting to 10000 in the jlink menu. This 
> doesn't 
> > work. If we set it to 60000 we have never had a problem!!!!
> > 
> > regards Doug


Yes we had to put a reset device in, we use a max809 (140mS delay) 
and haven't had any problems. With an RC network we had trouble with 
the debugger and actual boot ups of the board in standalone.

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