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IAR, JLINK and PLL problems

IAR, JLINK and PLL problems

2004-09-04 by itsjustimpossible

Hi
We are using the IAR workbench and Jlink to develop code for the 
LPC2129. I must use the PLL and debug from FLASH as my timing is 
criticle but the use of the PLL is preventing the Jlink connecting. 
The only way around this is to use the Philips Flash utility to 
erase the device each time before I start the debugger.
On the development board this is a pain, but I would prefer our 
target board not to have a serial port if possible.

Firstly, has anyone managed to get around this problem? (The recent 
Jlink DLL patch has not helped.)

Secondly, has anyone used an alternative debugger with IAR that does 
not have this problem?

Any comments would be greatly appreciated.

best regards
Simon

Re: IAR, JLINK and PLL problems

2004-09-05 by douglasbolton

--- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
wrote:
> Hi
> We are using the IAR workbench and Jlink to develop code for the 
> LPC2129. I must use the PLL and debug from FLASH as my timing is 
> criticle but the use of the PLL is preventing the Jlink connecting. 
> The only way around this is to use the Philips Flash utility to 
> erase the device each time before I start the debugger.
> On the development board this is a pain, but I would prefer our 
> target board not to have a serial port if possible.
> 
> Firstly, has anyone managed to get around this problem? (The recent 
> Jlink DLL patch has not helped.)
> 
> Secondly, has anyone used an alternative debugger with IAR that 
does 
> not have this problem?
> 
> Any comments would be greatly appreciated.
> 
> best regards
> Simon


We had the same problem. Once you have programmed the flash with the 
pll enabled the processor is history as far as the debugger is 
concerned until you scrub the flash.

I found jlink will work ok with pll running if you set the following 
in the jlink menu of the debugger.

1. tick philips lpc download button

2. tick reset aserts hardware reset pin

3. although this is not the case set the cclk to whatever you are 
running the cpu clock

we have a 10mhz crystal pumped up to 60 mhz by the pll. In theory we 
should set the cclk setting to 10000 in the jlink menu. This doesn't 
work. If we set it to 60000 we have never had a problem!!!!

regards Doug

Re: IAR, JLINK and PLL problems

2004-09-08 by itsjustimpossible

Hi Doug
Thanks for the info, and it has helped in some circumstances but I 
have to manually reset the board before I try to enter the debugger. 

I am now wondering if the board is resetting properly. The Keil 
evaluation board we are testing with has no reset IC, just an RC 
network.

Are you using a reset IC on your target board?

cheers
Simon


--- In lpc2000@yahoogroups.com, "douglasbolton" <doug@c...> wrote:
> --- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
> wrote:
> > Hi
> > We are using the IAR workbench and Jlink to develop code for the 
> > LPC2129. I must use the PLL and debug from FLASH as my timing is 
> > criticle but the use of the PLL is preventing the Jlink 
connecting. 
<snip>
> 
> We had the same problem. Once you have programmed the flash with 
the 
> pll enabled the processor is history as far as the debugger is 
> concerned until you scrub the flash.
> 
> I found jlink will work ok with pll running if you set the 
following 
> in the jlink menu of the debugger.
> 
> 1. tick philips lpc download button
> 
> 2. tick reset aserts hardware reset pin
> 
> 3. although this is not the case set the cclk to whatever you are 
> running the cpu clock
> 
> we have a 10mhz crystal pumped up to 60 mhz by the pll. In theory 
we 
> should set the cclk setting to 10000 in the jlink menu. This 
doesn't 
Show quoted textHide quoted text
> work. If we set it to 60000 we have never had a problem!!!!
> 
> regards Doug

Re: IAR, JLINK and PLL problems

2004-09-08 by douglasbolton

--- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
wrote:
> Hi Doug
> Thanks for the info, and it has helped in some circumstances but I 
> have to manually reset the board before I try to enter the 
debugger. 
> 
> I am now wondering if the board is resetting properly. The Keil 
> evaluation board we are testing with has no reset IC, just an RC 
> network.
> 
> Are you using a reset IC on your target board?
> 
> cheers
> Simon
> 
> 
> --- In lpc2000@yahoogroups.com, "douglasbolton" <doug@c...> wrote:
> > --- In lpc2000@yahoogroups.com, "itsjustimpossible" 
<simonjh@b...> 
> > wrote:
> > > Hi
> > > We are using the IAR workbench and Jlink to develop code for 
the 
> > > LPC2129. I must use the PLL and debug from FLASH as my timing 
is 
> > > criticle but the use of the PLL is preventing the Jlink 
> connecting. 
> <snip>
> > 
> > We had the same problem. Once you have programmed the flash with 
> the 
> > pll enabled the processor is history as far as the debugger is 
> > concerned until you scrub the flash.
> > 
> > I found jlink will work ok with pll running if you set the 
> following 
> > in the jlink menu of the debugger.
> > 
> > 1. tick philips lpc download button
> > 
> > 2. tick reset aserts hardware reset pin
> > 
> > 3. although this is not the case set the cclk to whatever you are 
> > running the cpu clock
> > 
> > we have a 10mhz crystal pumped up to 60 mhz by the pll. In theory 
> we 
> > should set the cclk setting to 10000 in the jlink menu. This 
> doesn't 
> > work. If we set it to 60000 we have never had a problem!!!!
> > 
> > regards Doug


Yes we had to put a reset device in, we use a max809 (140mS delay) 
and haven't had any problems. With an RC network we had trouble with 
the debugger and actual boot ups of the board in standalone.

Re: IAR, JLINK and PLL problems

2004-09-10 by itsjustimpossible

--- In lpc2000@yahoogroups.com, "douglasbolton" <doug@c...> wrote:
> --- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
> wrote:
> > Are you using a reset IC on your target board?
> > 
> 
> 
> Yes we had to put a reset device in, we use a max809 (140mS delay) 
> and haven't had any problems. With an RC network we had trouble 
with 
> the debugger and actual boot ups of the board in standalone.

Great, I will give it a try.

Thanks
Simon

Re: IAR, JLINK and PLL problems

2004-09-10 by Richard

Reset duration needs to be 10ms at power-up and 300ns thereafter.  I 
have seen problems with boards where the RC reset circuit provided a 
reset pulse on power-up which was too short.

Rich

--- In lpc2000@yahoogroups.com, "itsjustimpossible" <simonjh@b...> 
wrote:
> --- In lpc2000@yahoogroups.com, "douglasbolton" <doug@c...> wrote:
> > --- In lpc2000@yahoogroups.com, "itsjustimpossible" 
<simonjh@b...> 
> > wrote:
> > > Are you using a reset IC on your target board?
> > > 
> > 
> > 
> > Yes we had to put a reset device in, we use a max809 (140mS 
delay) 
Show quoted textHide quoted text
> > and haven't had any problems. With an RC network we had trouble 
> with 
> > the debugger and actual boot ups of the board in standalone.
> 
> Great, I will give it a try.
> 
> Thanks
> Simon

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