Lpc2000

--- In lpc2000@yahoogroups.com, "ducatman2000" <545545@b...> wrote:
> You are right, I made a mistake writing my previous mail, it was 
not 
> __enable_intrinsic() but of course __enable_interrupt().
> 
> Now I have introduced the IRQ Handler exactly as you told me. In 
that 
> way, the Timer1 ISR should be called by the irq_handler whenever 
an 
> interrupt occurs. BUT, it sill not work! In debug mode I can see 
the 
> timer incrementing and when it reaches the match value register, 
it 
> resets and put the IR1 bit to '1' but the ISR is never reached... 
I 
> think there is a problem with the IAR intrinsic __enable_interrupt
() and __disable_interrupt().
> In step by step mode, when the 
> __enable_interrupt() is executed, that blocks the programm... 

I remember this happening to me before, but at the time I wasn't 
sure why. I'm still learning the IAR library functions. Do you have 
the vectors in cstartup configured?

org     0x00
pc,=?cstartup
....
org	0x18
ldr	pc,=irq_handler
...

If u did, then check the status of cpsr after both intrinsic 
enable/disable functions. If the I & F bits (global IRQ & FIQ flags) 
don't change correctly, then those 2 library functions may very well 
be the fault.

> do you know the asm code of __enable_interrupt () ans 
__disable_interrupt ?
> 
> (the code follow at the end of this mail)

...that you can do for enable/disable with 3 asm instructions.

read cpsr --> register
modify I F bits 
store register --> cpsr

As long as you configure your processor to the required priviledge 
level (see ?cstartup examples & the ARM7TDMIS Documentation), you 
can easily modify the I & F bits of the cpsr register to 
enable/disable IRQ and FIQ global interrupts. 

Good luck!
Leighton