Lpc2000

--- In lpc2000@yahoogroups.com, "microbit" <microbit@c...> wrote:
> Hi Robert,
> 
> I went through the same "wondering".
> I noticed that the VICVectAddr gets reset after the vector to weak
> irq_handler. I just copped out and replaced
> 
> >   ldr pc, [pc, #irq_handler_address - . - 8]
> 
> with the classic :
> 
> ldr    pc, [pc , # -0xFF0]
> 
> That sets up VIC to directly vector to your IRQ handler address 
programnmed
> in.
> 
> PS : Don;t forget to update your bootloader checksum in vector 
table when
> you change it !
> 
> -- Kris
> 

Here's the way I do it:

// IRQ exception handler. Calls the interrupt handlers.
__irq __arm void irq_handler(void)
{
	void (*interrupt_function)();
	unsigned int vector;

	vector = VICVectAddr;	 // Get interrupt vector.
	interrupt_function = (void(*)())vector;
	(*interrupt_function)(); // Call vectored interrupt function.
	VICVectAddr = 0;	 // Clear interrupt in VIC.
}

That way you can write the individual ISRs in thumb mode.  The IRQ 
handler must be written in ARM mode because the processor is in that 
mode when an exception occurs.  During linking the weak link to 
irq_handler (or whatever it is called) gets replaced with the C 
function.

Randy Ott