Just for clarification on the UART Block Diagram (see UM)... 1. Do U0TSR & U0RSR actually representthe Tx & Rx FIFO buffers? I only see U0TSR & U0RSR illustrated here and I can't find any other documentation for it. Now concerning U0THR & U0RBR (data registers)... 2. Why do they both share the same memory address? I'd really like to know the purpose of this. 3. What will happen if the lpc receives a character while I'm writing to the transmit register? I ask this because currently, I'm having trouble running the serial port both ways (with interrupts) while sending replies and receiving command packets from the PC. Sometimes the protocol I'm using works. However, while debugging I always notice the lpc losing receiver bytes whenever communication goes wrong. I only observe this happening if the lpc's replying to a command packet and another command packet's coming in the same time. best regards, Leighton
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Questions on the UART Interface
2004-11-17 by Leighton Rowe
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