Lpc2000

Hi Tim,

> knowing more about the board (and other components) it would be very 
> hard to say what will turn out to be the source of the interference. 
> Throwing ferrites and cap's on the board can be counter productive 
> without knowing the frequencies that are causing 
> the problem.

Exactly, and I've seen this in practice - engineers going "the safe side" with
4 layers, and creating more bad than good.
I'm not opposed to 4-layer per se, but for mixed a really careful layout with
2 layers often suffices if you know the quircks a bit.

> Do you have access to a spectrum analyzer? This is 
> probably the most critical tool needed to diagnosis the problem.

Indeed, with near field probe on speccie, you can tell a lot.

> Also be aware, that even though your crystal is a lower frequency, 
> edges internal to the part(s)will occur much faster, as well as 
> harmonics of the fundamental frequency.  One you have the 
> frequencies and magnitude involved, then it's possible to formulate 
> a strategy.

Half indifferent, you'd have to drive the Xtal pretty hard to cause this,
and premature aging/drifting/life time will be badly compromised.
But nothing a good old series resistor won't fix, drive-wise.

> I believe most all the obvious fixes have been discussed already, 
> but I did not see anyone ask about your trace lengths, width and 
> spacing, as well as are there traces that run along the edge of the 
> board.  

I rasied this issue a while ago on MSP430 group, and a heated discussion
"fobbed" this all off, dismissing as "unnecessary" for digital < 30 MHz.
Well you could have 4-8 MHz clock high slew rate bus signals on "long"
tracks, that are completely the wrong impedance, terminate really poorly,
and cause heaps of EMI.
If this is mastered, it's almost a challenge/game to do something on 2 layers
instead of 4 :-)


> Do you have any traces that change direction by more than 45 
> degrees?  

Another important one, along with NOT using vias on clock/crystal lines !


B rgds
Kris



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