Lpc2000

At 01:55 AM 2/9/05 +1000, Peter Jakacki wrote:

>Robert Adsett wrote:
>
> >But to how low a voltage do they operate.  A good reset chip will provide a
> >low output down to about 0.8V.  It would be a real problem if the 8 pin
> >micro's brown-out circuitry kicked in and caused the reset line to float at
> >say 1.7V.  I suppose you could reverse the problem and use a resistive
> >pulldown and override that with a positive output but then you need to know
> >how high a resistance you can use and still provide a reset voltage
> >(particularly at low VCC), is that specced anywhere?
> >
>
>Yes, I always use a resistive pulldown for that very reason, but why do
>worry about how high a resistance? Granted, I usually use between 10K
>and 100K which is never a problem with a CMOS input.

If it's that high I don't worry.  I just want to keep the input below 1/2 a 
volt or so (at 10K that's 50uA, sounds doable).  A good deal of my 
hesitance is that I simply haven't sat down and worked it through.  This helps.


<snip>
>I've scoped this before under all kinds of nasty power up/downs.

That's good to hear.

>A circuit that is intrinsically in reset unless all systems are go is a
>very safe way to handle the reset.

That's what I'm looking for.


>This way works extremely well and permits ISP/reset over remote links.


I've always liked that idea.  Also if you incorporate a real watchdog in 
the processor it should be simple to add an output latch so you can flag 
that the watchdog has fired (nice for some timing related debugging).

>Well, that's the way I handle things in this area and others may have
>their own ideas. But that's what these discussions are good for, it's a
>real melting pot of ideas and experiences.


Melt away :)

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III