Lpc2000

A quad package on a 2 layer board is one of the more annoying layout 
problems, except just be glad you're not dealing with a BGA.

On the chip side, fan out all the traces at least 1 cm away from the 
chip, terminating at vias...consider the vias to be the start of your 
routing, not the pins on the chip.  Don't bring out any logic vias 
under the chip, this leaves you maneuvering room.  Run wide VSS and 
VDD traces on the non-chip side of the board to a 10 to 50 ufd 
Tantalum located right under the chip.  From the leads of the 
Tantalum, spider out individual traces to each of the VDD/VSS pairs, 
with at least a 100nf capacitor located as near as possible to each 
pair. This individual decoupling of each VDD/VSS pair is essential.  
Remember your reputation rides on your product, take whatever time 
needed to do it right.

A major point is to try to mount all the discretes on the side 
opposite the chips, this makes your topside fanouts and routing a lot 
easier to deal with, and the board fab will love you much more if 
you're going that route.

Bill T.
http://www.kupercontrols.com