Lpc2000

It sounds like you have a watchdog flag already lodged, ie even though 
not enabled the watchdog still runs, and, as soon as it becomes enabled 
, with ints enabled the old pending flag is executed. Try clearing any 
pending flags before enabling the watchdog.

Al

jane highland wrote:

> Yes I got fed up too. Get an external watchdog
> chip...you want to be able to 'scope' a real reset
> signal from something independent of the the LPC chip
> when the CPU screws up.
>
> If anything it will let you sleep at night, when
> you've got thousands of products out there in the
> field.
>
>
> Jane
> --- itsjustimpossible <simonjh@...> wrote:
>
> ---------------------------------
>
> Hi
> I am nearing the end of our first project with the
> LPC2294 and need
> to implement the watchdog.
>
> I am pretty sure I have it setup correctly, and with
> it in its debug
> mode I can cause a jump to the watchDog IRQ routine
> when I put the
> uP into an endless loop.
>
> As part of its functionality external interrupts are
> disabled until
> the equipment is set to GO, and this where the
> problems start. As
> soon as I enable the external interrupt the watchdog
> timer jumps to
> its ISR. (The external interrupts are set to FIQ and
> at 8uS
> intervals)
>
> Even with the watchdog timer set to a very very long
> timeout (i.e.
> ten seconds) as soon as external interrupts are
> enabled we jump to
> the WatchDog ISR.
>
> With the watchdog set to Off everything else works as
> expected.
> With the watchdog set to On but no external interrupts
> everything
> works as expected.
>
> When I kick the watchdog I am disabling all the
> interrupts using the
> VIC. Do I have to jump to system mode and disable the
> global IRQ and
> FIQ flags? This would probably be too slow...
>
> Has anyone else seen anything like this?
> At the moment its driving me nuts.
>
> many thanks
> Simon
>
>
>
>
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