Lpc2000

for a very low power datalogger have a look at msp430...


--- In lpc2000@yahoogroups.com, Owen Mooney <ojm@s...> wrote:
> Well - this all rips my socks!!
> 
> I put a post in a few weeks ago asking about power consumption of 
the LPC213x series
> for use in a data logger.
> 
> Robert said then about 150uA. This was too much for a logger with a 
10 year battery life on a Lithium.
> 
> So - I have just done a layout using a PIC ! 
> 
> Now I understand the latest run of chips is about 50uA. Quite some 
difference, and worth while ripping the PIC out of the circuit and 
putting in an LPC2132 
> 
> Please confirm. For an LPCLPC213x series microprocessor with 32768 
Xtal running powern consumption is 50+18uA in Powerdown mode and when 
I wake up from an external interupt I can read the current Xtal osc 
value in the CTC register ?
> 
> If so I will rip out the PIC anbd use one of these - even if I have 
to go to a C size cell.
> 
> What is the expected power consumptin of these devices in future 
production runs? 
> 
> Owen Mooney 
> 
> 
> 
> 
> 
>  Date: Wed, 02 Feb 2005 14:29:09 -0000
>    From: "tah2k" <tah2k@y...>
> Subject: Re: Supply Current. Lots additional information
> 
> 
> I didn't see an explanantion for the 350uA sleep current or my 
> questions 1 and 2 concerning the I/O. Do I need to try a new device 
> on the evaluation board?
> 
> 50uA sleep current is perfect, 140uA is tolerable, and 350uA is a 
> show stopper.
> 
> --- In lpc2000@yahoogroups.com, "philips_apps" <philips_apps@y...> 
> wrote:
> 
> >> 
> >> Tim,
> >> 
> >> I guess the 350 mA (the "m" should be a "u")was a typo. What you
> >> measured in power down for the RTC is correct between 15 and 20 
> >  
> >
> uAs. 
> 
> >> Logic in this process needs to run at 1.8V ± 10 %. A pin like 
> >  
> >
> Vbat
> 
> >> needs a wider spec and a different voltage. The spec for Vbat 
will 
> >  
> >
> be
> 
> >> significantly extended to probably 2.0V-3.6V (characterization is
> >> ongoing). To not damage the logic we need to convert the external
> >> voltage down to 1.8V The converter uses most of the 18 uAs you 
> >  
> >
> measured. 
> 
> >> The higher current during active mode is due to an chip failure 
on 
> >  
> >
> the
> 
> >> first devices, which have been used to build evaluation boards. 
New
> >> devices will not draw higher current during active mode on Vbat 
but
> >> still draw the 15-20 uAs.
> >> 
> >> THIS INFORMATION IS SPECIFIC FOR THE LPC2130 series
> >> Power down current on the first devices was measured around 140 
> >  
> >
> uAs,
> 
> >> keeping all the RAM intact. Our latest lot with some fixes 
brings 
> >  
> >
> this
> 
> >> value down to approx 50 uAs. 
> >> While this value might be too high for some of you, it might be 
> >  
> >
> good
> 
> >> enough for others and it is for sure a lot better than the 
previous
> >> option to go into idle mode using the RTC.
> >> 
> >> Comparing an ARM build in 0.18um process to an AVR, PIC, MSP430 
or 
> >  
> >
> you
> 
> >> name them is really comparing apples to oranges. New processes 
> >  
> >
> enable
> 
> >> the chip vendors to put more memory and build faster devices but 
> >  
> >
> the
> 
> >> leakage goes up. 
> >> 
> >> In the end the only thing I can tell you, this is as good as it 
> >  
> >
> gets
> 
> >> right now. Will let everybody know if we find ways to improve the
> >> power down behavior. Keep in mind that active current is as low 
or
> >> lower than an 8-bit running at the same clock rate delivering a 
lot
> >> less performance. 
> >> 
> >> Regards, Robert
> >> 
> >> --- In lpc2000@yahoogroups.com, "tah2k" <tah2k@y...> wrote:
> >  
> >
> >>> > 
> >>> > I finally got to the point of shutting down the LPC2138 on 
the 
> >>    
> >>
> Keil 
> 
> >>> > development board. Battery life is critical to my 
application, 
> >>> > therefore I need to verify the sleep specification. At room 
> >>> > temperature, with all I/O configured as input except for 
JTAG, I 
> >>    
> >>
> am 
> 
> >>> > measuring 350mA just on the VDD pins! Far from 10uA. All 
> >>    
> >>
> peripheral 
> 
> >>> > clocks are disabled except the RTC which is configured to use 
> >>    
> >>
> the 
> 
> >>> > 32kHz. 
> >>> > 
> >>> > FYI:
> >>> > Vbat: ~31uA while processor is on, ~18uA during powerdown. 
(Just 
> >>    
> >>
> for 
> 
> >>> > the RTC?!?!)
> >>> > 
> >>> > When it comes to sleep current issues, the first thing 
vendors 
> >>> > usually question is the I/O state. The following are the 
> >>    
> >>
> relevant 
> 
> >>> > register values:
> >>> > 
> >>> > PINSEL0: 0x0
> >>> > PINSEL1: 0x0
> >>> > PINSEL2: 0x4
> >>> > 
> >>> > IODIR0: 0x0
> >>> > IODIR1: 0x0
> >>> > 
> >>> > IOPIN0: 0x7EFFF7F8
> >>> > IOPIN1: 0x03FF0000
> >>> > 
> >>> > I'm puzzled about the I/O:
> >>> > 1.) The IOPIN register does not necessarily reflect the state 
of 
> >>    
> >>
> the 
> 
> >>> > I/O line. For example, P0.4 is not connected on the Keil 
board. 
> >>> > Since this pin is configured as an input, I would suspect the 
> >>> > voltage on the pin to reflect the internal pullup, but it 
> >>    
> >>
> measures 
> 
> >>> > 0V. Even more puzzling, IOPIN0 states this input is high. Go 
> >>    
> >>
> figure.
> 
> >>> > 
> >>> > 2.) Another concern: P0.31 is not connected, but configured 
as 
> >>    
> >>
> an 
> 
> >>> > input. If I measure the pin voltage it is 2.3 instead of 
3.3V. 
> >>    
> >>
> This 
> 
> >>> > is also true for P1.16-23 and P1.24-25. Could I be leaking 
> >>    
> >>
> current 
> 
> >>> > through the pullup resistor?
> >>> > 
> >>> > -Tim
> >>    
> >>
> >> ---  snip   -----
> >  
> >